\doxysection{bno08x\+\_\+config\+\_\+t Struct Reference} \hypertarget{structbno08x__config__t}{}\label{structbno08x__config__t}\index{bno08x\_config\_t@{bno08x\_config\_t}} IMU configuration settings passed into constructor. {\ttfamily \#include $<$BNO08x\+\_\+global\+\_\+types.\+hpp$>$} \doxysubsubsection*{Public Member Functions} \begin{DoxyCompactItemize} \item \mbox{\hyperlink{structbno08x__config__t_a68e051212415a62e64c23678e7b40552}{bno08x\+\_\+config\+\_\+t}} (bool \mbox{\hyperlink{structbno08x__config__t_a0f629aaef6756aa80fec96b34476c627}{install\+\_\+isr\+\_\+service}}=true) \begin{DoxyCompactList}\small\item\em Default IMU configuration settings constructor. To modify default GPIO pins, run "{}idf.\+py menuconfig"{} esp32\+\_\+\+BNO08x-\/\texorpdfstring{$>$}{>}GPIO Configuration. Alternatively, edit the default values in "{}\+Kconfig.\+projbuild"{}. \end{DoxyCompactList}\item \mbox{\hyperlink{structbno08x__config__t_a3a4ef8ef437403592278110a73cafe70}{bno08x\+\_\+config\+\_\+t}} (spi\+\_\+host\+\_\+device\+\_\+t \mbox{\hyperlink{structbno08x__config__t_a020d2343750bb7debc2a108ae038c9ec}{spi\+\_\+peripheral}}, gpio\+\_\+num\+\_\+t \mbox{\hyperlink{structbno08x__config__t_a79023fd80039e41a22b7f73ccd5fc861}{io\+\_\+mosi}}, gpio\+\_\+num\+\_\+t \mbox{\hyperlink{structbno08x__config__t_a9468180a773892977db39cc5ed9368e3}{io\+\_\+miso}}, gpio\+\_\+num\+\_\+t \mbox{\hyperlink{structbno08x__config__t_a639685b91ae3198909d722316495246a}{io\+\_\+sclk}}, gpio\+\_\+num\+\_\+t \mbox{\hyperlink{structbno08x__config__t_ab1b5351b63da0c172c942463d0dc2505}{io\+\_\+cs}}, gpio\+\_\+num\+\_\+t \mbox{\hyperlink{structbno08x__config__t_a3cfe965659cfbc6b0c5269bd0211975f}{io\+\_\+int}}, gpio\+\_\+num\+\_\+t \mbox{\hyperlink{structbno08x__config__t_a62745c761219139f66ecd173b51577fc}{io\+\_\+rst}}, gpio\+\_\+num\+\_\+t \mbox{\hyperlink{structbno08x__config__t_a90ad7f316dc443874d19dc7e723a0ce0}{io\+\_\+wake}}, uint32\+\_\+t \mbox{\hyperlink{structbno08x__config__t_a231614c3b20888360def2ce9db83f52a}{sclk\+\_\+speed}}, bool \mbox{\hyperlink{structbno08x__config__t_a0f629aaef6756aa80fec96b34476c627}{install\+\_\+isr\+\_\+service}}=true) \begin{DoxyCompactList}\small\item\em Overloaded IMU configuration settings constructor for custom pin settings. \end{DoxyCompactList}\end{DoxyCompactItemize} \doxysubsubsection*{Public Attributes} \begin{DoxyCompactItemize} \item spi\+\_\+host\+\_\+device\+\_\+t \mbox{\hyperlink{structbno08x__config__t_a020d2343750bb7debc2a108ae038c9ec}{spi\+\_\+peripheral}} \begin{DoxyCompactList}\small\item\em SPI peripheral to be used. \end{DoxyCompactList}\item gpio\+\_\+num\+\_\+t \mbox{\hyperlink{structbno08x__config__t_a79023fd80039e41a22b7f73ccd5fc861}{io\+\_\+mosi}} \begin{DoxyCompactList}\small\item\em MOSI GPIO pin (connects to \doxylink{class_b_n_o08x}{BNO08x} DI pin) \end{DoxyCompactList}\item gpio\+\_\+num\+\_\+t \mbox{\hyperlink{structbno08x__config__t_a9468180a773892977db39cc5ed9368e3}{io\+\_\+miso}} \begin{DoxyCompactList}\small\item\em MISO GPIO pin (connects to \doxylink{class_b_n_o08x}{BNO08x} SDA pin) \end{DoxyCompactList}\item gpio\+\_\+num\+\_\+t \mbox{\hyperlink{structbno08x__config__t_a639685b91ae3198909d722316495246a}{io\+\_\+sclk}} \begin{DoxyCompactList}\small\item\em SCLK pin (connects to \doxylink{class_b_n_o08x}{BNO08x} SCL pin) \end{DoxyCompactList}\item gpio\+\_\+num\+\_\+t \mbox{\hyperlink{structbno08x__config__t_ab1b5351b63da0c172c942463d0dc2505}{io\+\_\+cs}} \item gpio\+\_\+num\+\_\+t \mbox{\hyperlink{structbno08x__config__t_a3cfe965659cfbc6b0c5269bd0211975f}{io\+\_\+int}} \begin{DoxyCompactList}\small\item\em Chip select pin (connects to \doxylink{class_b_n_o08x}{BNO08x} CS pin) \end{DoxyCompactList}\item gpio\+\_\+num\+\_\+t \mbox{\hyperlink{structbno08x__config__t_a62745c761219139f66ecd173b51577fc}{io\+\_\+rst}} \begin{DoxyCompactList}\small\item\em Host interrupt pin (connects to \doxylink{class_b_n_o08x}{BNO08x} INT pin) \end{DoxyCompactList}\item gpio\+\_\+num\+\_\+t \mbox{\hyperlink{structbno08x__config__t_a90ad7f316dc443874d19dc7e723a0ce0}{io\+\_\+wake}} \begin{DoxyCompactList}\small\item\em Reset pin (connects to \doxylink{class_b_n_o08x}{BNO08x} RST pin) \end{DoxyCompactList}\item uint32\+\_\+t \mbox{\hyperlink{structbno08x__config__t_a231614c3b20888360def2ce9db83f52a}{sclk\+\_\+speed}} \begin{DoxyCompactList}\small\item\em Desired SPI SCLK speed in Hz (max 3MHz) \end{DoxyCompactList}\item bool \mbox{\hyperlink{structbno08x__config__t_a0f629aaef6756aa80fec96b34476c627}{install\+\_\+isr\+\_\+service}} \begin{DoxyCompactList}\small\item\em Indicates whether the ISR service for the HINT should be installed at IMU initialization, (if gpio\+\_\+install\+\_\+isr\+\_\+service() is called before initialize() set this to false) \end{DoxyCompactList}\end{DoxyCompactItemize} \doxysubsection{Detailed Description} IMU configuration settings passed into constructor. \doxysubsection{Constructor \& Destructor Documentation} \Hypertarget{structbno08x__config__t_a68e051212415a62e64c23678e7b40552}\label{structbno08x__config__t_a68e051212415a62e64c23678e7b40552} \index{bno08x\_config\_t@{bno08x\_config\_t}!bno08x\_config\_t@{bno08x\_config\_t}} \index{bno08x\_config\_t@{bno08x\_config\_t}!bno08x\_config\_t@{bno08x\_config\_t}} \doxysubsubsection{\texorpdfstring{bno08x\_config\_t()}{bno08x\_config\_t()}\hspace{0.1cm}{\footnotesize\ttfamily [1/2]}} {\footnotesize\ttfamily bno08x\+\_\+config\+\_\+t\+::bno08x\+\_\+config\+\_\+t (\begin{DoxyParamCaption}\item[{bool}]{install\+\_\+isr\+\_\+service = {\ttfamily true} }\end{DoxyParamCaption})\hspace{0.3cm}{\ttfamily [inline]}} Default IMU configuration settings constructor. To modify default GPIO pins, run "{}idf.\+py menuconfig"{} esp32\+\_\+\+BNO08x-\/\texorpdfstring{$>$}{>}GPIO Configuration. Alternatively, edit the default values in "{}\+Kconfig.\+projbuild"{}. \Hypertarget{structbno08x__config__t_a3a4ef8ef437403592278110a73cafe70}\label{structbno08x__config__t_a3a4ef8ef437403592278110a73cafe70} \index{bno08x\_config\_t@{bno08x\_config\_t}!bno08x\_config\_t@{bno08x\_config\_t}} \index{bno08x\_config\_t@{bno08x\_config\_t}!bno08x\_config\_t@{bno08x\_config\_t}} \doxysubsubsection{\texorpdfstring{bno08x\_config\_t()}{bno08x\_config\_t()}\hspace{0.1cm}{\footnotesize\ttfamily [2/2]}} {\footnotesize\ttfamily bno08x\+\_\+config\+\_\+t\+::bno08x\+\_\+config\+\_\+t (\begin{DoxyParamCaption}\item[{spi\+\_\+host\+\_\+device\+\_\+t}]{spi\+\_\+peripheral, }\item[{gpio\+\_\+num\+\_\+t}]{io\+\_\+mosi, }\item[{gpio\+\_\+num\+\_\+t}]{io\+\_\+miso, }\item[{gpio\+\_\+num\+\_\+t}]{io\+\_\+sclk, }\item[{gpio\+\_\+num\+\_\+t}]{io\+\_\+cs, }\item[{gpio\+\_\+num\+\_\+t}]{io\+\_\+int, }\item[{gpio\+\_\+num\+\_\+t}]{io\+\_\+rst, }\item[{gpio\+\_\+num\+\_\+t}]{io\+\_\+wake, }\item[{uint32\+\_\+t}]{sclk\+\_\+speed, }\item[{bool}]{install\+\_\+isr\+\_\+service = {\ttfamily true} }\end{DoxyParamCaption})\hspace{0.3cm}{\ttfamily [inline]}} Overloaded IMU configuration settings constructor for custom pin settings. \doxysubsection{Member Data Documentation} \Hypertarget{structbno08x__config__t_a0f629aaef6756aa80fec96b34476c627}\label{structbno08x__config__t_a0f629aaef6756aa80fec96b34476c627} \index{bno08x\_config\_t@{bno08x\_config\_t}!install\_isr\_service@{install\_isr\_service}} \index{install\_isr\_service@{install\_isr\_service}!bno08x\_config\_t@{bno08x\_config\_t}} \doxysubsubsection{\texorpdfstring{install\_isr\_service}{install\_isr\_service}} {\footnotesize\ttfamily bool bno08x\+\_\+config\+\_\+t\+::install\+\_\+isr\+\_\+service} Indicates whether the ISR service for the HINT should be installed at IMU initialization, (if gpio\+\_\+install\+\_\+isr\+\_\+service() is called before initialize() set this to false) \Hypertarget{structbno08x__config__t_ab1b5351b63da0c172c942463d0dc2505}\label{structbno08x__config__t_ab1b5351b63da0c172c942463d0dc2505} \index{bno08x\_config\_t@{bno08x\_config\_t}!io\_cs@{io\_cs}} \index{io\_cs@{io\_cs}!bno08x\_config\_t@{bno08x\_config\_t}} \doxysubsubsection{\texorpdfstring{io\_cs}{io\_cs}} {\footnotesize\ttfamily gpio\+\_\+num\+\_\+t bno08x\+\_\+config\+\_\+t\+::io\+\_\+cs} \Hypertarget{structbno08x__config__t_a3cfe965659cfbc6b0c5269bd0211975f}\label{structbno08x__config__t_a3cfe965659cfbc6b0c5269bd0211975f} \index{bno08x\_config\_t@{bno08x\_config\_t}!io\_int@{io\_int}} \index{io\_int@{io\_int}!bno08x\_config\_t@{bno08x\_config\_t}} \doxysubsubsection{\texorpdfstring{io\_int}{io\_int}} {\footnotesize\ttfamily gpio\+\_\+num\+\_\+t bno08x\+\_\+config\+\_\+t\+::io\+\_\+int} Chip select pin (connects to \doxylink{class_b_n_o08x}{BNO08x} CS pin) \Hypertarget{structbno08x__config__t_a9468180a773892977db39cc5ed9368e3}\label{structbno08x__config__t_a9468180a773892977db39cc5ed9368e3} \index{bno08x\_config\_t@{bno08x\_config\_t}!io\_miso@{io\_miso}} \index{io\_miso@{io\_miso}!bno08x\_config\_t@{bno08x\_config\_t}} \doxysubsubsection{\texorpdfstring{io\_miso}{io\_miso}} {\footnotesize\ttfamily gpio\+\_\+num\+\_\+t bno08x\+\_\+config\+\_\+t\+::io\+\_\+miso} MISO GPIO pin (connects to \doxylink{class_b_n_o08x}{BNO08x} SDA pin) \Hypertarget{structbno08x__config__t_a79023fd80039e41a22b7f73ccd5fc861}\label{structbno08x__config__t_a79023fd80039e41a22b7f73ccd5fc861} \index{bno08x\_config\_t@{bno08x\_config\_t}!io\_mosi@{io\_mosi}} \index{io\_mosi@{io\_mosi}!bno08x\_config\_t@{bno08x\_config\_t}} \doxysubsubsection{\texorpdfstring{io\_mosi}{io\_mosi}} {\footnotesize\ttfamily gpio\+\_\+num\+\_\+t bno08x\+\_\+config\+\_\+t\+::io\+\_\+mosi} MOSI GPIO pin (connects to \doxylink{class_b_n_o08x}{BNO08x} DI pin) \Hypertarget{structbno08x__config__t_a62745c761219139f66ecd173b51577fc}\label{structbno08x__config__t_a62745c761219139f66ecd173b51577fc} \index{bno08x\_config\_t@{bno08x\_config\_t}!io\_rst@{io\_rst}} \index{io\_rst@{io\_rst}!bno08x\_config\_t@{bno08x\_config\_t}} \doxysubsubsection{\texorpdfstring{io\_rst}{io\_rst}} {\footnotesize\ttfamily gpio\+\_\+num\+\_\+t bno08x\+\_\+config\+\_\+t\+::io\+\_\+rst} Host interrupt pin (connects to \doxylink{class_b_n_o08x}{BNO08x} INT pin) \Hypertarget{structbno08x__config__t_a639685b91ae3198909d722316495246a}\label{structbno08x__config__t_a639685b91ae3198909d722316495246a} \index{bno08x\_config\_t@{bno08x\_config\_t}!io\_sclk@{io\_sclk}} \index{io\_sclk@{io\_sclk}!bno08x\_config\_t@{bno08x\_config\_t}} \doxysubsubsection{\texorpdfstring{io\_sclk}{io\_sclk}} {\footnotesize\ttfamily gpio\+\_\+num\+\_\+t bno08x\+\_\+config\+\_\+t\+::io\+\_\+sclk} SCLK pin (connects to \doxylink{class_b_n_o08x}{BNO08x} SCL pin) \Hypertarget{structbno08x__config__t_a90ad7f316dc443874d19dc7e723a0ce0}\label{structbno08x__config__t_a90ad7f316dc443874d19dc7e723a0ce0} \index{bno08x\_config\_t@{bno08x\_config\_t}!io\_wake@{io\_wake}} \index{io\_wake@{io\_wake}!bno08x\_config\_t@{bno08x\_config\_t}} \doxysubsubsection{\texorpdfstring{io\_wake}{io\_wake}} {\footnotesize\ttfamily gpio\+\_\+num\+\_\+t bno08x\+\_\+config\+\_\+t\+::io\+\_\+wake} Reset pin (connects to \doxylink{class_b_n_o08x}{BNO08x} RST pin) Wake pin (optional, connects to \doxylink{class_b_n_o08x}{BNO08x} P0) \Hypertarget{structbno08x__config__t_a231614c3b20888360def2ce9db83f52a}\label{structbno08x__config__t_a231614c3b20888360def2ce9db83f52a} \index{bno08x\_config\_t@{bno08x\_config\_t}!sclk\_speed@{sclk\_speed}} \index{sclk\_speed@{sclk\_speed}!bno08x\_config\_t@{bno08x\_config\_t}} \doxysubsubsection{\texorpdfstring{sclk\_speed}{sclk\_speed}} {\footnotesize\ttfamily uint32\+\_\+t bno08x\+\_\+config\+\_\+t\+::sclk\+\_\+speed} Desired SPI SCLK speed in Hz (max 3MHz) \Hypertarget{structbno08x__config__t_a020d2343750bb7debc2a108ae038c9ec}\label{structbno08x__config__t_a020d2343750bb7debc2a108ae038c9ec} \index{bno08x\_config\_t@{bno08x\_config\_t}!spi\_peripheral@{spi\_peripheral}} \index{spi\_peripheral@{spi\_peripheral}!bno08x\_config\_t@{bno08x\_config\_t}} \doxysubsubsection{\texorpdfstring{spi\_peripheral}{spi\_peripheral}} {\footnotesize\ttfamily spi\+\_\+host\+\_\+device\+\_\+t bno08x\+\_\+config\+\_\+t\+::spi\+\_\+peripheral} SPI peripheral to be used. The documentation for this struct was generated from the following file\+:\begin{DoxyCompactItemize} \item \mbox{\hyperlink{_b_n_o08x__global__types_8hpp}{BNO08x\+\_\+global\+\_\+types.\+hpp}}\end{DoxyCompactItemize}