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Move back the RF69_SPI_CS line

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Max Prokhorov 2021-01-26 22:24:22 +03:00 committed by GitHub
parent 56a4556ef3
commit 2efd5b9b9f
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1 changed files with 2 additions and 2 deletions
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RFM69.h
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@ -118,6 +118,8 @@
#endif #endif
//////////////////////////////////////////////////// ////////////////////////////////////////////////////
#define RF69_SPI_CS SS // SS is the SPI slave select pin, for instance D10 on ATmega328
// INT0 on AVRs should be connected to RFM69's DIO0 (ex on ATmega328 it's D2, on ATmega644/1284 it's D2) // INT0 on AVRs should be connected to RFM69's DIO0 (ex on ATmega328 it's D2, on ATmega644/1284 it's D2)
#if defined(__AVR_ATmega168__) || defined(__AVR_ATmega328P__) || defined(__AVR_ATmega88) || defined(__AVR_ATmega8__) || defined(__AVR_ATmega88__) #if defined(__AVR_ATmega168__) || defined(__AVR_ATmega328P__) || defined(__AVR_ATmega88) || defined(__AVR_ATmega8__) || defined(__AVR_ATmega88__)
#define RF69_IRQ_PIN 2 #define RF69_IRQ_PIN 2
@ -142,8 +144,6 @@
#define RF69_IRQ_PIN 2 #define RF69_IRQ_PIN 2
#endif #endif
#define RF69_SPI_CS SS // SS is the SPI slave select pin, for instance D10 on ATmega328
#define RF69_MAX_DATA_LEN 61 // to take advantage of the built in AES/CRC we want to limit the frame size to the internal FIFO size (66 bytes - 3 bytes overhead - 2 bytes crc) #define RF69_MAX_DATA_LEN 61 // to take advantage of the built in AES/CRC we want to limit the frame size to the internal FIFO size (66 bytes - 3 bytes overhead - 2 bytes crc)
#define CSMA_LIMIT -90 // upper RX signal sensitivity threshold in dBm for carrier sense access #define CSMA_LIMIT -90 // upper RX signal sensitivity threshold in dBm for carrier sense access
#define RF69_MODE_SLEEP 0 // XTAL OFF #define RF69_MODE_SLEEP 0 // XTAL OFF