SAMD21 faster SPI clk, SAMD51 IRQ_PIN
This commit is contained in:
parent
1e1236d4b4
commit
1fe8191663
|
|
@ -484,8 +484,10 @@ void RFM69::select() {
|
||||||
// set RFM69 SPI settings explicitly
|
// set RFM69 SPI settings explicitly
|
||||||
SPI.setDataMode(SPI_MODE0);
|
SPI.setDataMode(SPI_MODE0);
|
||||||
SPI.setBitOrder(MSBFIRST);
|
SPI.setBitOrder(MSBFIRST);
|
||||||
#ifdef __arm__
|
#ifdef defined(__SAMD21__)
|
||||||
SPI.setClockDivider(SPI_CLOCK_DIV16);
|
SPI.setClockDivider(SPI_CLOCK_DIV2);
|
||||||
|
#elif defined(__SAMD51__)
|
||||||
|
SPI.setClockDivider(SPI_CLOCK_DIV16);
|
||||||
#else
|
#else
|
||||||
SPI.setClockDivider(SPI_CLOCK_DIV4); // decided to slow down from DIV2 after SPI stalling in some instances, especially visible on mega1284p when RFM69 and FLASH chip both present
|
SPI.setClockDivider(SPI_CLOCK_DIV4); // decided to slow down from DIV2 after SPI stalling in some instances, especially visible on mega1284p when RFM69 and FLASH chip both present
|
||||||
#endif
|
#endif
|
||||||
|
|
|
||||||
2
RFM69.h
2
RFM69.h
|
|
@ -129,6 +129,8 @@
|
||||||
#define RF69_IRQ_PIN PA3
|
#define RF69_IRQ_PIN PA3
|
||||||
#elif defined(MOTEINO_M0)
|
#elif defined(MOTEINO_M0)
|
||||||
#define RF69_IRQ_PIN 9
|
#define RF69_IRQ_PIN 9
|
||||||
|
#elif defined(__SAMD51__)
|
||||||
|
#define RF69_IRQ_PIN 18
|
||||||
#elif defined(ARDUINO_SAMD_ZERO) //includes Feather SAMD
|
#elif defined(ARDUINO_SAMD_ZERO) //includes Feather SAMD
|
||||||
#define RF69_IRQ_PIN 3
|
#define RF69_IRQ_PIN 3
|
||||||
#elif defined(ESP8266)
|
#elif defined(ESP8266)
|
||||||
|
|
|
||||||
Loading…
Reference in New Issue