2013-07-14 04:49:26 +01:00
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// **********************************************************************************
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2026-03-29 18:04:36 +01:00
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// Driver definition for HopeRF RFM69W/RFM69HW/RFM69CW/RFM69HCW, Semtech
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// SX1231/1231H
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2013-07-14 04:49:26 +01:00
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// **********************************************************************************
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2018-04-09 19:19:14 +01:00
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// Copyright LowPowerLab LLC 2018, https://www.LowPowerLab.com/contact
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2014-08-13 03:03:19 +01:00
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// **********************************************************************************
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// License
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// **********************************************************************************
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2026-03-29 18:04:36 +01:00
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// This program is free software; you can redistribute it
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// and/or modify it under the terms of the GNU General
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// Public License as published by the Free Software
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// Foundation; either version 3 of the License, or
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// (at your option) any later version.
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//
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// This program is distributed in the hope that it will
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// be useful, but WITHOUT ANY WARRANTY; without even the
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// implied warranty of MERCHANTABILITY or FITNESS FOR A
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// PARTICULAR PURPOSE. See the GNU General Public
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// License for more details.
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//
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// Licence can be viewed at
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2014-11-14 20:25:45 +00:00
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// http://www.gnu.org/licenses/gpl-3.0.txt
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2014-08-13 03:03:19 +01:00
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//
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// Please maintain this license information along with authorship
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// and copyright notices in any redistribution of this code
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2013-07-14 04:49:26 +01:00
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// **********************************************************************************
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2020-02-14 11:02:28 +00:00
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#include "RFM69.h"
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#include "RFM69registers.h"
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2026-03-29 18:04:36 +01:00
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#include "esp_log.h"
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2013-06-20 22:06:39 +01:00
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#include <SPI.h>
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2026-03-29 18:04:36 +01:00
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uint8_t RFM69::DATA[RF69_MAX_DATA_LEN + 1];
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uint8_t RFM69::_mode; // current transceiver state
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2019-01-16 00:29:39 +00:00
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uint8_t RFM69::DATALEN;
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2019-05-01 17:02:03 +01:00
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uint16_t RFM69::SENDERID;
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2026-03-29 18:04:36 +01:00
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uint16_t RFM69::TARGETID; // should match _address
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2019-01-16 00:29:39 +00:00
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uint8_t RFM69::PAYLOADLEN;
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uint8_t RFM69::ACK_REQUESTED;
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2026-03-29 18:04:36 +01:00
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uint8_t RFM69::ACK_RECEIVED; // should be polled immediately after sending a
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// packet with ACK request
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int16_t RFM69::RSSI; // most accurate RSSI during reception (closest to the
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// reception)
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2018-08-08 20:34:31 +01:00
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volatile bool RFM69::_haveData;
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2022-07-10 15:55:33 +01:00
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RFM69 *RFM69::_instance = nullptr;
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2013-06-20 22:06:39 +01:00
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2026-03-29 18:04:36 +01:00
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RFM69::RFM69(uint8_t slaveSelectPin, uint8_t interruptPin, bool isRFM69HW_HCW,
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SPIClass *spi) {
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2022-07-10 15:55:33 +01:00
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_instance = this;
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2018-04-05 21:00:36 +01:00
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_slaveSelectPin = slaveSelectPin;
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_interruptPin = interruptPin;
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_mode = RF69_MODE_STANDBY;
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2020-01-21 17:52:45 +00:00
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_spyMode = false;
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2018-04-05 21:00:36 +01:00
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_powerLevel = 31;
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2021-08-30 21:52:42 +01:00
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_isRFM69HW = isRFM69HW_HCW;
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2020-06-02 12:43:09 +01:00
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_spi = spi;
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2018-04-05 21:20:12 +01:00
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#if defined(RF69_LISTENMODE_ENABLE)
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2018-04-05 21:00:36 +01:00
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_isHighSpeed = true;
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_haveEncryptKey = false;
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uint32_t rxDuration = DEFAULT_LISTEN_RX_US;
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uint32_t idleDuration = DEFAULT_LISTEN_IDLE_US;
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listenModeSetDurations(rxDuration, idleDuration);
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#endif
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}
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2023-08-13 02:29:01 +01:00
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bool RFM69::initialize(uint8_t freqBand, uint16_t nodeID, uint8_t networkID) {
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2018-04-05 21:00:36 +01:00
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_interruptNum = digitalPinToInterrupt(_interruptPin);
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2026-03-29 18:04:36 +01:00
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if (_interruptNum == (uint8_t)NOT_AN_INTERRUPT)
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return false;
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2018-04-05 21:00:36 +01:00
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#ifdef RF69_ATTACHINTERRUPT_TAKES_PIN_NUMBER
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2026-03-29 18:04:36 +01:00
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_interruptNum = _interruptPin;
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2018-04-05 21:00:36 +01:00
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#endif
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2023-08-13 02:29:01 +01:00
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const uint8_t CONFIG[][2] = {
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2026-03-29 18:04:36 +01:00
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/* 0x01 */ {REG_OPMODE, RF_OPMODE_SEQUENCER_ON | RF_OPMODE_LISTEN_OFF |
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RF_OPMODE_STANDBY},
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/* 0x02 */
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{REG_DATAMODUL, RF_DATAMODUL_DATAMODE_PACKET |
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RF_DATAMODUL_MODULATIONTYPE_FSK |
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RF_DATAMODUL_MODULATIONSHAPING_00}, // no shaping
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/* 0x03 */ {REG_BITRATEMSB, RF_BITRATEMSB_55555}, // default: 4.8 KBPS
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/* 0x04 */ {REG_BITRATELSB, RF_BITRATELSB_55555},
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/* 0x05 */ {REG_FDEVMSB, RF_FDEVMSB_50000}, // default: 5KHz,
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// (FDEV+(BitRate/2)<=500KHz)
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/* 0x06 */ {REG_FDEVLSB, RF_FDEVLSB_50000},
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/* 0x07 */
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{REG_FRFMSB,
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(uint8_t)(freqBand == RF69_315MHZ
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? RF_FRFMSB_315
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: (freqBand == RF69_433MHZ
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? RF_FRFMSB_433_92
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: (freqBand == RF69_868MHZ ? RF_FRFMSB_868
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: RF_FRFMSB_915)))},
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/* 0x08 */
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{REG_FRFMID,
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(uint8_t)(freqBand == RF69_315MHZ
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? RF_FRFMID_315
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: (freqBand == RF69_433MHZ
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? RF_FRFMID_433_92
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: (freqBand == RF69_868MHZ ? RF_FRFMID_868
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: RF_FRFMID_915)))},
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/* 0x09 */
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{REG_FRFLSB,
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(uint8_t)(freqBand == RF69_315MHZ
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? RF_FRFLSB_315
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: (freqBand == RF69_433MHZ
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? RF_FRFLSB_433_92
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: (freqBand == RF69_868MHZ ? RF_FRFLSB_868
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: RF_FRFLSB_915)))},
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// looks like PA1 and PA2 are not implemented on RFM69W/CW, hence the max
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// output power is 13dBm +17dBm and +20dBm are possible on RFM69HW +13dBm
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// formula: Pout = -18 + OutputPower (with PA0 or PA1**) +17dBm formula:
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// Pout = -14 + OutputPower (with PA1 and PA2)** +20dBm formula: Pout =
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// -11 + OutputPower (with PA1 and PA2)** and high power PA settings
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// (section 3.3.7 in datasheet)
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///* 0x11 */ { REG_PALEVEL, RF_PALEVEL_PA0_ON | RF_PALEVEL_PA1_OFF |
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/// RF_PALEVEL_PA2_OFF | RF_PALEVEL_OUTPUTPOWER_11111},
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///* 0x13 */ { REG_OCP, RF_OCP_ON | RF_OCP_TRIM_95 }, // over current
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/// protection (default is 95mA)
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// RXBW defaults are { REG_RXBW, RF_RXBW_DCCFREQ_010 | RF_RXBW_MANT_24 |
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// RF_RXBW_EXP_5} (RxBw: 10.4KHz)
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/* 0x19 */
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{REG_RXBW, RF_RXBW_DCCFREQ_010 | RF_RXBW_MANT_16 |
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RF_RXBW_EXP_2}, // (BitRate < 2 * RxBw)
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// for BR-19200: /* 0x19 */ { REG_RXBW, RF_RXBW_DCCFREQ_010 |
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// RF_RXBW_MANT_24 | RF_RXBW_EXP_3 },
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/* 0x25 */ {REG_DIOMAPPING1, RF_DIOMAPPING1_DIO0_01}, // DIO0 is the only
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// IRQ we're using
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/* 0x26 */ {REG_DIOMAPPING2, RF_DIOMAPPING2_CLKOUT_OFF}, // DIO5 ClkOut
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// disable for
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// power saving
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/* 0x28 */ {REG_IRQFLAGS2, RF_IRQFLAGS2_FIFOOVERRUN}, // writing to this
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// bit ensures that
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// the FIFO & status
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// flags are reset
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/* 0x29 */ {REG_RSSITHRESH, 220}, // must be set to dBm = (-Sensitivity /
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// 2), default is 0xE4 = 228 so -114dBm
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///* 0x2D */ { REG_PREAMBLELSB, RF_PREAMBLESIZE_LSB_VALUE } // default 3
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/// preamble bytes 0xAAAAAA
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/* 0x2E */
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{REG_SYNCCONFIG,
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RF_SYNC_ON | RF_SYNC_FIFOFILL_AUTO | RF_SYNC_SIZE_2 | RF_SYNC_TOL_0},
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/* 0x2F */ {REG_SYNCVALUE1, 0x2D}, // attempt to make this compatible with
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// sync1 byte of RFM12B lib
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/* 0x30 */ {REG_SYNCVALUE2, networkID}, // NETWORK ID
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//* 0x31 */ { REG_SYNCVALUE3, 0xAA },
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//* 0x31 */ { REG_SYNCVALUE4, 0xBB },
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/* 0x37 */
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{REG_PACKETCONFIG1, RF_PACKET1_FORMAT_VARIABLE | RF_PACKET1_DCFREE_OFF |
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RF_PACKET1_CRC_ON | RF_PACKET1_CRCAUTOCLEAR_ON |
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RF_PACKET1_ADRSFILTERING_OFF},
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/* 0x38 */ {REG_PAYLOADLENGTH, 66}, // in variable length mode: the max
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// frame size, not used in TX
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///* 0x39 */ { REG_NODEADRS, nodeID }, // turned off because we're not
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/// using address filtering
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/* 0x3C */
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{REG_FIFOTHRESH, RF_FIFOTHRESH_TXSTART_FIFONOTEMPTY |
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RF_FIFOTHRESH_VALUE}, // TX on FIFO not empty
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/* 0x3D */
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{REG_PACKETCONFIG2,
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RF_PACKET2_RXRESTARTDELAY_2BITS | RF_PACKET2_AUTORXRESTART_OFF |
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RF_PACKET2_AES_OFF}, // RXRESTARTDELAY must match transmitter PA
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// ramp-down time (bitrate dependent)
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// for BR-19200: /* 0x3D */ { REG_PACKETCONFIG2,
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// RF_PACKET2_RXRESTARTDELAY_NONE | RF_PACKET2_AUTORXRESTART_ON |
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// RF_PACKET2_AES_OFF }, // RXRESTARTDELAY must match transmitter PA
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// ramp-down time (bitrate dependent)
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/* 0x6F */
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{REG_TESTDAGC,
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RF_DAGC_IMPROVED_LOWBETA0}, // run DAGC continuously in RX mode for
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// Fading Margin Improvement, recommended
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// default for AfcLowBetaOn=0
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{255, 0}};
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2013-07-14 04:49:26 +01:00
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2013-06-20 22:06:39 +01:00
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pinMode(_slaveSelectPin, OUTPUT);
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2026-03-29 18:04:36 +01:00
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digitalWrite(_slaveSelectPin, HIGH);
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2025-01-03 12:22:35 +00:00
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if (_spi == nullptr) {
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2026-03-29 18:04:36 +01:00
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ESP_LOGE("RADIO_INT", "USING DEFAULT SPI.");
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2020-06-02 12:43:09 +01:00
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_spi = &SPI;
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}
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_spi->begin();
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2018-12-14 00:39:20 +00:00
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#ifdef SPI_HAS_TRANSACTION
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2020-05-18 16:12:28 +01:00
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_settings = SPISettings(8000000, MSBFIRST, SPI_MODE0);
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2018-12-14 00:39:20 +00:00
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#endif
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2019-08-02 21:38:00 +01:00
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uint32_t start = millis();
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2015-10-01 17:15:28 +01:00
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uint8_t timeout = 50;
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2026-03-29 18:04:36 +01:00
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do
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writeReg(REG_SYNCVALUE1, 0xAA);
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while (readReg(REG_SYNCVALUE1) != 0xaa && millis() - start < timeout);
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if (millis() - start >= timeout)
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return false;
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2015-10-01 17:15:28 +01:00
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start = millis();
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2026-03-29 18:04:36 +01:00
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do
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writeReg(REG_SYNCVALUE1, 0x55);
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while (readReg(REG_SYNCVALUE1) != 0x55 && millis() - start < timeout);
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if (millis() - start >= timeout)
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return false;
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2014-08-13 03:03:19 +01:00
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2015-01-12 10:34:16 +00:00
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for (uint8_t i = 0; CONFIG[i][0] != 255; i++)
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2013-06-20 22:06:39 +01:00
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writeReg(CONFIG[i][0], CONFIG[i][1]);
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2026-03-29 18:04:36 +01:00
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// Encryption is persistent between resets and can trip you up during
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// debugging. Disable it during initialization so we always start from a known
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// state.
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2014-01-02 21:57:18 +00:00
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encrypt(0);
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2026-03-29 18:04:36 +01:00
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setHighPower(
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_isRFM69HW); // called regardless if it's a RFM69W or RFM69HW (at this
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// point _isRFM69HW may not be explicitly set by constructor
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// and setHighPower() may not have been called yet (ie called
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// after initialize() call)
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2013-06-20 22:06:39 +01:00
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setMode(RF69_MODE_STANDBY);
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2015-10-01 17:15:28 +01:00
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start = millis();
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2026-03-29 18:04:36 +01:00
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while (((readReg(REG_IRQFLAGS1) & RF_IRQFLAGS1_MODEREADY) == 0x00) &&
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millis() - start < timeout)
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; // wait for ModeReady
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if (millis() - start >= timeout)
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return false;
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2014-08-13 03:03:19 +01:00
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attachInterrupt(_interruptNum, RFM69::isr0, RISING);
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2013-06-20 22:06:39 +01:00
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_address = nodeID;
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2025-01-03 14:12:16 +00:00
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_networkID = networkID;
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2018-04-05 21:20:12 +01:00
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#if defined(RF69_LISTENMODE_ENABLE)
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2019-08-02 21:38:00 +01:00
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selfPointer = this;
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2018-04-05 21:20:12 +01:00
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_freqBand = freqBand;
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#endif
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2013-10-27 23:53:02 +00:00
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return true;
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2013-06-20 22:06:39 +01:00
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}
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2026-03-29 18:04:36 +01:00
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uint8_t RFM69::getVersion() { return readReg(REG_VERSION); }
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2025-01-03 14:12:16 +00:00
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2015-01-06 14:25:29 +00:00
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// return the frequency (in Hz)
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2023-08-13 02:29:01 +01:00
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uint32_t RFM69::getFrequency() {
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2026-03-29 18:04:36 +01:00
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return RF69_FSTEP *
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(((uint32_t)readReg(REG_FRFMSB) << 16) +
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((uint16_t)readReg(REG_FRFMID) << 8) + readReg(REG_FRFLSB));
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2014-11-14 20:25:45 +00:00
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}
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2015-01-06 14:25:29 +00:00
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// set the frequency (in Hz)
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2023-08-13 02:29:01 +01:00
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void RFM69::setFrequency(uint32_t freqHz) {
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2015-01-18 11:22:43 +00:00
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uint8_t oldMode = _mode;
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|
|
if (oldMode == RF69_MODE_TX) {
|
|
|
|
|
setMode(RF69_MODE_RX);
|
|
|
|
|
}
|
2015-01-06 14:25:29 +00:00
|
|
|
freqHz /= RF69_FSTEP; // divide down by FSTEP to get FRF
|
2014-11-14 20:25:45 +00:00
|
|
|
writeReg(REG_FRFMSB, freqHz >> 16);
|
|
|
|
|
writeReg(REG_FRFMID, freqHz >> 8);
|
|
|
|
|
writeReg(REG_FRFLSB, freqHz);
|
2015-01-18 11:22:43 +00:00
|
|
|
if (oldMode == RF69_MODE_RX) {
|
|
|
|
|
setMode(RF69_MODE_SYNTH);
|
|
|
|
|
}
|
|
|
|
|
setMode(oldMode);
|
2013-06-20 22:06:39 +01:00
|
|
|
}
|
|
|
|
|
|
2025-01-03 14:12:16 +00:00
|
|
|
// return the frequency deviation (in Hz)
|
|
|
|
|
uint32_t RFM69::getFrequencyDeviation() {
|
2026-03-29 18:04:36 +01:00
|
|
|
return RF69_FSTEP * ((readReg(REG_FDEVMSB) << 8) | readReg(REG_FDEVLSB));
|
2025-01-03 14:12:16 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
uint32_t RFM69::getBitRate() {
|
2026-03-29 18:04:36 +01:00
|
|
|
return RF69_FXOSC /
|
|
|
|
|
((readReg(REG_BITRATEMSB) << 8) | readReg(REG_BITRATELSB));
|
2025-01-03 14:12:16 +00:00
|
|
|
}
|
|
|
|
|
|
2023-08-13 02:29:01 +01:00
|
|
|
void RFM69::setMode(uint8_t newMode) {
|
2015-01-18 11:22:43 +00:00
|
|
|
if (newMode == _mode)
|
|
|
|
|
return;
|
2013-06-20 22:06:39 +01:00
|
|
|
|
2015-01-06 13:46:04 +00:00
|
|
|
switch (newMode) {
|
2026-03-29 18:04:36 +01:00
|
|
|
case RF69_MODE_TX:
|
|
|
|
|
writeReg(REG_OPMODE, (readReg(REG_OPMODE) & 0xE3) | RF_OPMODE_TRANSMITTER);
|
|
|
|
|
if (_isRFM69HW)
|
|
|
|
|
setHighPowerRegs(true);
|
|
|
|
|
break;
|
|
|
|
|
case RF69_MODE_RX:
|
|
|
|
|
writeReg(REG_OPMODE, (readReg(REG_OPMODE) & 0xE3) | RF_OPMODE_RECEIVER);
|
|
|
|
|
if (_isRFM69HW)
|
|
|
|
|
setHighPowerRegs(false);
|
|
|
|
|
break;
|
|
|
|
|
case RF69_MODE_SYNTH:
|
|
|
|
|
writeReg(REG_OPMODE, (readReg(REG_OPMODE) & 0xE3) | RF_OPMODE_SYNTHESIZER);
|
|
|
|
|
break;
|
|
|
|
|
case RF69_MODE_STANDBY:
|
|
|
|
|
writeReg(REG_OPMODE, (readReg(REG_OPMODE) & 0xE3) | RF_OPMODE_STANDBY);
|
|
|
|
|
break;
|
|
|
|
|
case RF69_MODE_SLEEP:
|
|
|
|
|
writeReg(REG_OPMODE, (readReg(REG_OPMODE) & 0xE3) | RF_OPMODE_SLEEP);
|
|
|
|
|
break;
|
|
|
|
|
default:
|
|
|
|
|
return;
|
2015-01-06 13:46:04 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
// we are using packet mode, so this check is not really needed
|
2026-03-29 18:04:36 +01:00
|
|
|
// but waiting for mode ready is necessary when going from sleep because the
|
|
|
|
|
// FIFO may not be immediately available from previous mode
|
|
|
|
|
while (_mode == RF69_MODE_SLEEP &&
|
|
|
|
|
(readReg(REG_IRQFLAGS1) & RF_IRQFLAGS1_MODEREADY) == 0x00)
|
|
|
|
|
; // wait for ModeReady
|
2013-06-20 22:06:39 +01:00
|
|
|
|
2015-01-06 13:46:04 +00:00
|
|
|
_mode = newMode;
|
2013-06-20 22:06:39 +01:00
|
|
|
}
|
|
|
|
|
|
2026-03-29 18:04:36 +01:00
|
|
|
// put transceiver in sleep mode to save battery - to wake or resume receiving
|
|
|
|
|
// just call receiveDone()
|
|
|
|
|
void RFM69::sleep() { setMode(RF69_MODE_SLEEP); }
|
2013-06-20 22:06:39 +01:00
|
|
|
|
2025-01-03 12:22:35 +00:00
|
|
|
// set this node's address
|
2023-08-13 02:29:01 +01:00
|
|
|
void RFM69::setAddress(uint16_t addr) {
|
2013-07-14 04:49:26 +01:00
|
|
|
_address = addr;
|
2025-01-03 14:12:16 +00:00
|
|
|
writeReg(REG_NODEADRS, _address); // unused in packet mode
|
|
|
|
|
}
|
|
|
|
|
|
2026-03-29 18:04:36 +01:00
|
|
|
uint16_t RFM69::getAddress() { return _address; }
|
2013-06-20 22:06:39 +01:00
|
|
|
|
2025-01-03 12:22:35 +00:00
|
|
|
// set this node's network id
|
2023-08-13 02:29:01 +01:00
|
|
|
void RFM69::setNetwork(uint8_t networkID) {
|
2025-01-03 14:12:16 +00:00
|
|
|
_networkID = networkID;
|
2015-01-06 13:46:04 +00:00
|
|
|
writeReg(REG_SYNCVALUE2, networkID);
|
2013-06-20 22:06:39 +01:00
|
|
|
}
|
|
|
|
|
|
2026-03-29 18:04:36 +01:00
|
|
|
uint8_t RFM69::getNetwork() { return _networkID; }
|
2025-01-03 14:12:16 +00:00
|
|
|
|
2025-01-03 12:22:35 +00:00
|
|
|
// set user's ISR callback
|
2026-03-29 18:04:36 +01:00
|
|
|
void RFM69::setIsrCallback(void (*callback)()) { _isrCallback = callback; }
|
2022-07-11 18:51:58 +01:00
|
|
|
|
2021-08-30 21:52:42 +01:00
|
|
|
// Control transmitter output power (this is NOT a dBm value!)
|
2026-03-29 18:04:36 +01:00
|
|
|
// the power configurations are explained in the SX1231H datasheet (Table 10 on
|
|
|
|
|
// p21; RegPaLevel p66): http://www.semtech.com/images/datasheet/sx1231h.pdf
|
|
|
|
|
// valid powerLevel parameter values are 0-31 and result in a directly
|
|
|
|
|
// proportional effect on the output/transmission power this function implements
|
|
|
|
|
// 2 modes as follows:
|
|
|
|
|
// - for RFM69 W/CW the range is from 0-31 [-18dBm to 13dBm] (PA0 only on RFIO
|
|
|
|
|
// pin)
|
|
|
|
|
// - for RFM69 HW/HCW the range is from 0-22 [-2dBm to 20dBm] (PA1 & PA2 on
|
|
|
|
|
// PA_BOOST pin & high Power PA settings - see section 3.3.7 in datasheet,
|
|
|
|
|
// p22)
|
2021-08-30 21:52:42 +01:00
|
|
|
// - the HW/HCW 0-24 range is split into 3 REG_PALEVEL parts:
|
|
|
|
|
// - 0-15 = REG_PALEVEL 16-31, ie [-2 to 13dBm] & PA1 only
|
|
|
|
|
// - 16-19 = REG_PALEVEL 26-29, ie [12 to 15dBm] & PA1+PA2
|
2026-03-29 18:04:36 +01:00
|
|
|
// - 20-23 = REG_PALEVEL 28-31, ie [17 to 20dBm] & PA1+PA2+HiPower (HiPower
|
|
|
|
|
// is only enabled before going in TX mode, ie by setMode(RF69_MODE_TX)
|
|
|
|
|
// The HW/HCW range overlaps are to smooth out transitions between the 3 PA
|
|
|
|
|
// domains, based on actual current/RSSI measurements Any changes to this
|
|
|
|
|
// function also demand changes in dependent function setPowerDBm()
|
2021-08-30 21:52:42 +01:00
|
|
|
void RFM69::setPowerLevel(uint8_t powerLevel) {
|
|
|
|
|
uint8_t PA_SETTING;
|
|
|
|
|
if (_isRFM69HW) {
|
2026-03-29 18:04:36 +01:00
|
|
|
if (powerLevel > 23)
|
|
|
|
|
powerLevel = 23;
|
|
|
|
|
_powerLevel = powerLevel;
|
2021-08-30 21:52:42 +01:00
|
|
|
|
2026-03-29 18:04:36 +01:00
|
|
|
// now set Pout value & active PAs based on _powerLevel range as outlined in
|
|
|
|
|
// summary above
|
2021-08-30 21:52:42 +01:00
|
|
|
if (_powerLevel < 16) {
|
|
|
|
|
powerLevel += 16;
|
|
|
|
|
PA_SETTING = RF_PALEVEL_PA1_ON; // enable PA1 only
|
|
|
|
|
} else {
|
|
|
|
|
if (_powerLevel < 20)
|
|
|
|
|
powerLevel += 10;
|
2026-03-29 18:04:36 +01:00
|
|
|
else
|
2021-08-30 21:52:42 +01:00
|
|
|
powerLevel += 8;
|
|
|
|
|
PA_SETTING = RF_PALEVEL_PA1_ON | RF_PALEVEL_PA2_ON; // enable PA1+PA2
|
|
|
|
|
}
|
2026-03-29 18:04:36 +01:00
|
|
|
setHighPowerRegs(true); // always call this in case we're crossing power
|
|
|
|
|
// boundaries in TX mode
|
|
|
|
|
} else { // this is a W/CW, register value is the same as _powerLevel
|
|
|
|
|
if (powerLevel > 31)
|
|
|
|
|
powerLevel = 31;
|
|
|
|
|
_powerLevel = powerLevel;
|
2021-08-30 21:52:42 +01:00
|
|
|
PA_SETTING = RF_PALEVEL_PA0_ON; // enable PA0 only
|
|
|
|
|
}
|
|
|
|
|
|
2026-03-29 18:04:36 +01:00
|
|
|
// write value to REG_PALEVEL
|
2021-08-30 21:52:42 +01:00
|
|
|
writeReg(REG_PALEVEL, PA_SETTING | powerLevel);
|
2013-06-20 22:06:39 +01:00
|
|
|
}
|
|
|
|
|
|
2025-01-03 14:12:16 +00:00
|
|
|
uint8_t RFM69::getOutputPower() {
|
|
|
|
|
// _RegisterBits(_REG_PA_LEVEL, offset=0, bits=5)
|
|
|
|
|
return readReg(REG_PALEVEL) & 0x1F;
|
|
|
|
|
}
|
|
|
|
|
|
2025-02-13 02:20:36 +00:00
|
|
|
// return stored _powerLevel
|
|
|
|
|
uint8_t RFM69::getPowerLevel() { return _powerLevel; }
|
2020-06-02 14:56:38 +01:00
|
|
|
|
2025-01-03 12:22:35 +00:00
|
|
|
// Set TX Output power in dBm:
|
2021-08-30 21:52:42 +01:00
|
|
|
// [-18..+13]dBm in RFM69 W/CW
|
|
|
|
|
// [ -2..+20]dBm in RFM69 HW/HCW
|
|
|
|
|
int8_t RFM69::setPowerDBm(int8_t dBm) {
|
|
|
|
|
if (_isRFM69HW) {
|
2026-03-29 18:04:36 +01:00
|
|
|
// fix any out of bounds
|
|
|
|
|
if (dBm < -2)
|
|
|
|
|
dBm = -2;
|
|
|
|
|
else if (dBm > 20)
|
|
|
|
|
dBm = 20;
|
|
|
|
|
|
|
|
|
|
// map dBm to _powerLevel according to implementation in setPowerLevel()
|
|
|
|
|
if (dBm < 12)
|
|
|
|
|
setPowerLevel(2 + dBm);
|
|
|
|
|
else if (dBm < 16)
|
|
|
|
|
setPowerLevel(4 + dBm);
|
|
|
|
|
else
|
|
|
|
|
setPowerLevel(3 + dBm);
|
|
|
|
|
} else { // W/CW
|
|
|
|
|
if (dBm < -18)
|
|
|
|
|
dBm = -18;
|
|
|
|
|
else if (dBm > 13)
|
|
|
|
|
dBm = 13;
|
|
|
|
|
setPowerLevel(18 + dBm);
|
2021-08-30 21:52:42 +01:00
|
|
|
}
|
|
|
|
|
return dBm;
|
|
|
|
|
}
|
|
|
|
|
|
2026-03-29 18:04:36 +01:00
|
|
|
double RFM69::dBm_to_mW(uint8_t dBm) { return pow(10, (dBm / 10.0)); }
|
2025-01-03 14:12:16 +00:00
|
|
|
|
2023-08-13 02:29:01 +01:00
|
|
|
bool RFM69::canSend() {
|
2026-03-29 18:04:36 +01:00
|
|
|
if (_mode == RF69_MODE_RX && PAYLOADLEN == 0 &&
|
|
|
|
|
readRSSI() < CSMA_LIMIT) { // if signal stronger than -100dBm is detected
|
|
|
|
|
// assume channel activity
|
2013-06-20 22:06:39 +01:00
|
|
|
setMode(RF69_MODE_STANDBY);
|
|
|
|
|
return true;
|
|
|
|
|
}
|
|
|
|
|
return false;
|
|
|
|
|
}
|
|
|
|
|
|
2026-03-29 18:04:36 +01:00
|
|
|
void RFM69::send(uint16_t toAddress, const void *buffer, uint8_t bufferSize,
|
|
|
|
|
bool requestACK) {
|
|
|
|
|
writeReg(REG_PACKETCONFIG2, (readReg(REG_PACKETCONFIG2) & 0xFB) |
|
|
|
|
|
RF_PACKET2_RXRESTART); // avoid RX deadlocks
|
2015-01-12 10:34:16 +00:00
|
|
|
uint32_t now = millis();
|
2026-03-29 18:04:36 +01:00
|
|
|
while (!canSend() && millis() - now < RF69_CSMA_LIMIT_MS) {
|
|
|
|
|
receiveDone();
|
2022-02-25 10:02:39 +00:00
|
|
|
#ifdef ESP8266
|
2026-03-29 18:04:36 +01:00
|
|
|
delay(1); // Give esp8266-based boards to handle background tasks. Seems to
|
|
|
|
|
// work better than yield();
|
2022-02-25 10:02:39 +00:00
|
|
|
#endif
|
|
|
|
|
}
|
2026-03-29 18:04:36 +01:00
|
|
|
|
2013-06-20 22:06:39 +01:00
|
|
|
sendFrame(toAddress, buffer, bufferSize, requestACK, false);
|
|
|
|
|
}
|
|
|
|
|
|
2026-03-29 18:04:36 +01:00
|
|
|
// to increase the chance of getting a packet across, call this function instead
|
|
|
|
|
// of send and it handles all the ACK requesting/retrying for you :) The only
|
|
|
|
|
// twist is that you have to manually listen to ACK requests on the other side
|
|
|
|
|
// and send back the ACKs The reason for the semi-automaton is that the lib is
|
|
|
|
|
// interrupt driven and requires user action to read the received data and
|
|
|
|
|
// decide what to do with it replies usually take only 5..8ms at 50kbps@915MHz
|
|
|
|
|
bool RFM69::sendWithRetry(uint16_t toAddress, const void *buffer,
|
|
|
|
|
uint8_t bufferSize, uint8_t retries,
|
|
|
|
|
uint8_t retryWaitTime) {
|
2015-01-12 10:34:16 +00:00
|
|
|
uint32_t sentTime;
|
2023-08-13 02:29:01 +01:00
|
|
|
for (uint8_t i = 0; i <= retries; i++) {
|
2013-06-20 22:06:39 +01:00
|
|
|
send(toAddress, buffer, bufferSize, true);
|
|
|
|
|
sentTime = millis();
|
2023-08-13 02:29:01 +01:00
|
|
|
while (millis() - sentTime < retryWaitTime) {
|
2026-03-29 18:04:36 +01:00
|
|
|
if (ACKReceived(toAddress))
|
|
|
|
|
return true;
|
2013-06-20 22:06:39 +01:00
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
return false;
|
|
|
|
|
}
|
|
|
|
|
|
2015-01-06 14:25:29 +00:00
|
|
|
// should be polled immediately after sending a packet with ACK request
|
2019-05-01 17:02:03 +01:00
|
|
|
bool RFM69::ACKReceived(uint16_t fromNodeID) {
|
2013-06-20 22:06:39 +01:00
|
|
|
if (receiveDone())
|
2026-03-29 18:04:36 +01:00
|
|
|
return (SENDERID == fromNodeID || fromNodeID == RF69_BROADCAST_ADDR) &&
|
|
|
|
|
ACK_RECEIVED;
|
2013-06-20 22:06:39 +01:00
|
|
|
return false;
|
|
|
|
|
}
|
|
|
|
|
|
2026-03-29 18:04:36 +01:00
|
|
|
// check whether an ACK was requested in the last received packet
|
|
|
|
|
// (non-broadcasted packet)
|
|
|
|
|
bool RFM69::ACKRequested() { return ACK_REQUESTED && (TARGETID == _address); }
|
2014-08-13 03:03:19 +01:00
|
|
|
|
2015-01-06 14:25:29 +00:00
|
|
|
// should be called immediately after reception in case sender wants ACK
|
2026-03-29 18:04:36 +01:00
|
|
|
void RFM69::sendACK(const void *buffer, uint8_t bufferSize) {
|
|
|
|
|
ACK_REQUESTED = 0; // TWS added to make sure we don't end up in a timing race
|
|
|
|
|
// and infinite loop sending Acks
|
2019-05-01 17:02:03 +01:00
|
|
|
uint16_t sender = SENDERID;
|
2015-01-12 10:34:16 +00:00
|
|
|
int16_t _RSSI = RSSI; // save payload received RSSI value
|
2026-03-29 18:04:36 +01:00
|
|
|
writeReg(REG_PACKETCONFIG2, (readReg(REG_PACKETCONFIG2) & 0xFB) |
|
|
|
|
|
RF_PACKET2_RXRESTART); // avoid RX deadlocks
|
2015-01-12 10:34:16 +00:00
|
|
|
uint32_t now = millis();
|
2026-03-29 18:04:36 +01:00
|
|
|
while (!canSend() && millis() - now < RF69_CSMA_LIMIT_MS) {
|
|
|
|
|
receiveDone();
|
2021-07-15 21:33:27 +01:00
|
|
|
#ifdef ESP8266
|
2026-03-29 18:04:36 +01:00
|
|
|
delay(1); // Give esp8266-based boards to handle background tasks. Seems to
|
|
|
|
|
// work better than yield().
|
2021-07-15 21:33:27 +01:00
|
|
|
#endif
|
|
|
|
|
}
|
2026-03-29 18:04:36 +01:00
|
|
|
SENDERID =
|
|
|
|
|
sender; // TWS: Restore SenderID after it gets wiped out by receiveDone()
|
2013-07-14 04:49:26 +01:00
|
|
|
sendFrame(sender, buffer, bufferSize, false, true);
|
2015-01-06 14:25:29 +00:00
|
|
|
RSSI = _RSSI; // restore payload RSSI
|
2013-06-20 22:06:39 +01:00
|
|
|
}
|
|
|
|
|
|
2015-05-19 20:08:41 +01:00
|
|
|
// internal function
|
2026-03-29 18:04:36 +01:00
|
|
|
void RFM69::sendFrame(uint16_t toAddress, const void *buffer,
|
|
|
|
|
uint8_t bufferSize, bool requestACK, bool sendACK) {
|
|
|
|
|
|
|
|
|
|
setMode(RF69_MODE_STANDBY);
|
|
|
|
|
|
|
|
|
|
uint32_t mode_timeout = millis();
|
|
|
|
|
while ((readReg(REG_IRQFLAGS1) & RF_IRQFLAGS1_MODEREADY) == 0x00) {
|
|
|
|
|
if (millis() - mode_timeout > 100) {
|
|
|
|
|
ESP_LOGE("RADIO_TX", "TIMEOUT: ModeReady never happened!");
|
|
|
|
|
return;
|
|
|
|
|
}
|
|
|
|
|
vTaskDelay(1); // Let FreeRTOS breathe
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
if (bufferSize > RF69_MAX_DATA_LEN)
|
|
|
|
|
bufferSize = RF69_MAX_DATA_LEN;
|
|
|
|
|
|
2015-02-06 11:21:13 +00:00
|
|
|
uint8_t CTLbyte = 0x00;
|
2013-06-20 22:06:39 +01:00
|
|
|
if (sendACK)
|
2015-10-01 17:15:28 +01:00
|
|
|
CTLbyte = RFM69_CTL_SENDACK;
|
2013-06-20 22:06:39 +01:00
|
|
|
else if (requestACK)
|
2015-10-01 17:15:28 +01:00
|
|
|
CTLbyte = RFM69_CTL_REQACK;
|
2015-02-06 11:21:13 +00:00
|
|
|
|
2026-03-29 18:04:36 +01:00
|
|
|
if (toAddress > 0xFF)
|
|
|
|
|
CTLbyte |= (toAddress & 0x300) >> 6;
|
|
|
|
|
if (_address > 0xFF)
|
|
|
|
|
CTLbyte |= (_address & 0x300) >> 8;
|
2019-05-01 17:02:03 +01:00
|
|
|
|
2015-01-06 13:46:04 +00:00
|
|
|
select();
|
2020-06-02 12:43:09 +01:00
|
|
|
_spi->transfer(REG_FIFO | 0x80);
|
|
|
|
|
_spi->transfer(bufferSize + 3);
|
|
|
|
|
_spi->transfer((uint8_t)toAddress);
|
|
|
|
|
_spi->transfer((uint8_t)_address);
|
|
|
|
|
_spi->transfer(CTLbyte);
|
2015-01-06 13:46:04 +00:00
|
|
|
|
2015-01-12 10:34:16 +00:00
|
|
|
for (uint8_t i = 0; i < bufferSize; i++)
|
2026-03-29 18:04:36 +01:00
|
|
|
_spi->transfer(((uint8_t *)buffer)[i]);
|
2015-01-06 13:46:04 +00:00
|
|
|
unselect();
|
2013-06-20 22:06:39 +01:00
|
|
|
|
2015-01-06 13:46:04 +00:00
|
|
|
setMode(RF69_MODE_TX);
|
2026-03-29 18:04:36 +01:00
|
|
|
|
|
|
|
|
uint32_t tx_timeout = millis();
|
|
|
|
|
bool success = false;
|
|
|
|
|
|
|
|
|
|
while (millis() - tx_timeout < 500) { // 500ms safety timeout
|
|
|
|
|
if ((readReg(REG_IRQFLAGS2) & RF_IRQFLAGS2_PACKETSENT) != 0x00) {
|
|
|
|
|
success = true;
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
// CRITICAL: This allows the Watchdog to reset
|
|
|
|
|
vTaskDelay(pdMS_TO_TICKS(1));
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
if (success) {
|
|
|
|
|
} else {
|
|
|
|
|
ESP_LOGE("RADIO_TX", "Step 5: FAILED - PACKETSENT bit never flipped!");
|
|
|
|
|
// Check IRQ Flags to see what state it's stuck in
|
|
|
|
|
ESP_LOGE("RADIO_TX", "IRQ1: 0x%02X, IRQ2: 0x%02X", readReg(REG_IRQFLAGS1),
|
|
|
|
|
readReg(REG_IRQFLAGS2));
|
|
|
|
|
}
|
|
|
|
|
|
2013-06-20 22:06:39 +01:00
|
|
|
setMode(RF69_MODE_STANDBY);
|
|
|
|
|
}
|
|
|
|
|
|
2015-05-19 20:08:41 +01:00
|
|
|
// internal function - interrupt gets called when a packet is received
|
2013-06-20 22:06:39 +01:00
|
|
|
void RFM69::interruptHandler() {
|
2026-03-29 18:04:36 +01:00
|
|
|
if (_mode == RF69_MODE_RX &&
|
|
|
|
|
(readReg(REG_IRQFLAGS2) & RF_IRQFLAGS2_PAYLOADREADY)) {
|
2013-06-20 22:06:39 +01:00
|
|
|
setMode(RF69_MODE_STANDBY);
|
|
|
|
|
select();
|
2020-06-02 12:43:09 +01:00
|
|
|
_spi->transfer(REG_FIFO & 0x7F);
|
|
|
|
|
PAYLOADLEN = _spi->transfer(0);
|
2015-01-06 14:25:29 +00:00
|
|
|
PAYLOADLEN = PAYLOADLEN > 66 ? 66 : PAYLOADLEN; // precaution
|
2020-06-02 12:43:09 +01:00
|
|
|
TARGETID = _spi->transfer(0);
|
|
|
|
|
SENDERID = _spi->transfer(0);
|
|
|
|
|
uint8_t CTLbyte = _spi->transfer(0);
|
2026-03-29 18:04:36 +01:00
|
|
|
TARGETID |= (uint16_t(CTLbyte) & 0x0C)
|
|
|
|
|
<< 6; // 10 bit address (most significant 2 bits stored in
|
|
|
|
|
// bits(2,3) of CTL byte
|
|
|
|
|
SENDERID |= (uint16_t(CTLbyte) & 0x03)
|
|
|
|
|
<< 8; // 10 bit address (most sifnigicant 2 bits stored in
|
|
|
|
|
// bits(0,1) of CTL byte
|
|
|
|
|
|
|
|
|
|
if (!(_spyMode || TARGETID == _address ||
|
|
|
|
|
TARGETID ==
|
|
|
|
|
RF69_BROADCAST_ADDR) // match this node's address, or broadcast
|
|
|
|
|
// address or anything in spy mode
|
|
|
|
|
||
|
|
|
|
|
PAYLOADLEN < 3) // address situation could receive packets that are
|
|
|
|
|
// malformed and don't fit this libraries extra fields
|
2013-06-20 22:06:39 +01:00
|
|
|
{
|
|
|
|
|
PAYLOADLEN = 0;
|
|
|
|
|
unselect();
|
2014-11-17 19:58:00 +00:00
|
|
|
receiveBegin();
|
2013-06-20 22:06:39 +01:00
|
|
|
return;
|
|
|
|
|
}
|
2014-11-17 19:58:00 +00:00
|
|
|
|
2013-09-06 00:32:11 +01:00
|
|
|
DATALEN = PAYLOADLEN - 3;
|
2015-10-01 17:15:28 +01:00
|
|
|
ACK_RECEIVED = CTLbyte & RFM69_CTL_SENDACK; // extract ACK-received flag
|
|
|
|
|
ACK_REQUESTED = CTLbyte & RFM69_CTL_REQACK; // extract ACK-requested flag
|
2026-03-29 18:04:36 +01:00
|
|
|
uint8_t _pl =
|
|
|
|
|
_powerLevel; // interruptHook() can change _powerLevel so remember it
|
|
|
|
|
interruptHook(CTLbyte); // TWS: hook to derived class interrupt function
|
2015-01-06 13:46:04 +00:00
|
|
|
|
2026-03-29 18:04:36 +01:00
|
|
|
for (uint8_t i = 0; i < DATALEN; i++)
|
|
|
|
|
DATA[i] = _spi->transfer(0);
|
2019-06-05 16:38:14 +01:00
|
|
|
|
|
|
|
|
DATA[DATALEN] = 0; // add null at end of string // add null at end of string
|
2013-06-20 22:06:39 +01:00
|
|
|
unselect();
|
|
|
|
|
setMode(RF69_MODE_RX);
|
2026-03-29 18:04:36 +01:00
|
|
|
if (_pl != _powerLevel)
|
|
|
|
|
setPowerLevel(_powerLevel); // set new _powerLevel if changed
|
2013-06-20 22:06:39 +01:00
|
|
|
}
|
2013-11-07 04:15:51 +00:00
|
|
|
RSSI = readRSSI();
|
2013-06-20 22:06:39 +01:00
|
|
|
}
|
|
|
|
|
|
2015-05-19 20:08:41 +01:00
|
|
|
// internal function
|
2022-07-10 15:55:33 +01:00
|
|
|
ISR_PREFIX void RFM69::isr0() {
|
|
|
|
|
_haveData = true;
|
|
|
|
|
if (_instance->_isrCallback)
|
|
|
|
|
_instance->_isrCallback();
|
|
|
|
|
}
|
2013-06-20 22:06:39 +01:00
|
|
|
|
2015-05-19 20:08:41 +01:00
|
|
|
// internal function
|
2013-06-20 22:06:39 +01:00
|
|
|
void RFM69::receiveBegin() {
|
2013-07-14 04:49:26 +01:00
|
|
|
DATALEN = 0;
|
|
|
|
|
SENDERID = 0;
|
|
|
|
|
TARGETID = 0;
|
|
|
|
|
PAYLOADLEN = 0;
|
|
|
|
|
ACK_REQUESTED = 0;
|
|
|
|
|
ACK_RECEIVED = 0;
|
2018-04-05 21:20:12 +01:00
|
|
|
#if defined(RF69_LISTENMODE_ENABLE)
|
|
|
|
|
RF69_LISTEN_BURST_REMAINING_MS = 0;
|
|
|
|
|
#endif
|
2013-11-07 04:15:51 +00:00
|
|
|
RSSI = 0;
|
2013-07-14 04:49:26 +01:00
|
|
|
if (readReg(REG_IRQFLAGS2) & RF_IRQFLAGS2_PAYLOADREADY)
|
2026-03-29 18:04:36 +01:00
|
|
|
writeReg(REG_PACKETCONFIG2, (readReg(REG_PACKETCONFIG2) & 0xFB) |
|
|
|
|
|
RF_PACKET2_RXRESTART); // avoid RX deadlocks
|
|
|
|
|
writeReg(
|
|
|
|
|
REG_DIOMAPPING1,
|
|
|
|
|
RF_DIOMAPPING1_DIO0_01); // set DIO0 to "PAYLOADREADY" in receive mode
|
2013-06-20 22:06:39 +01:00
|
|
|
setMode(RF69_MODE_RX);
|
|
|
|
|
}
|
|
|
|
|
|
2026-03-29 18:04:36 +01:00
|
|
|
// checks if a packet was received and/or puts transceiver in receive (ie RX or
|
|
|
|
|
// listen) mode
|
2013-06-20 22:06:39 +01:00
|
|
|
bool RFM69::receiveDone() {
|
2018-08-08 20:34:31 +01:00
|
|
|
if (_haveData) {
|
2026-03-29 18:04:36 +01:00
|
|
|
_haveData = false;
|
|
|
|
|
interruptHandler();
|
2018-08-08 20:34:31 +01:00
|
|
|
}
|
2023-08-13 02:29:01 +01:00
|
|
|
if (_mode == RF69_MODE_RX && PAYLOADLEN > 0) {
|
2016-03-01 02:21:52 +00:00
|
|
|
setMode(RF69_MODE_STANDBY); // enables interrupts
|
2013-06-20 22:06:39 +01:00
|
|
|
return true;
|
2023-08-13 02:29:01 +01:00
|
|
|
} else if (_mode == RF69_MODE_RX) { // already in RX no payload yet
|
2014-02-02 02:13:40 +00:00
|
|
|
return false;
|
|
|
|
|
}
|
2013-06-20 22:06:39 +01:00
|
|
|
receiveBegin();
|
|
|
|
|
return false;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
// To enable encryption: radio.encrypt("ABCDEFGHIJKLMNOP");
|
|
|
|
|
// To disable encryption: radio.encrypt(null) or radio.encrypt(0)
|
|
|
|
|
// KEY HAS TO BE 16 bytes !!!
|
2026-03-29 18:04:36 +01:00
|
|
|
void RFM69::encrypt(const char *key) {
|
2018-04-05 21:20:12 +01:00
|
|
|
#if defined(RF69_LISTENMODE_ENABLE)
|
|
|
|
|
_haveEncryptKey = key;
|
|
|
|
|
#endif
|
2013-06-20 22:06:39 +01:00
|
|
|
setMode(RF69_MODE_STANDBY);
|
2026-03-29 18:04:36 +01:00
|
|
|
uint8_t validKey = key != 0 && strlen(key) != 0;
|
2023-08-13 02:29:01 +01:00
|
|
|
if (validKey) {
|
2018-04-05 21:20:12 +01:00
|
|
|
#if defined(RF69_LISTENMODE_ENABLE)
|
|
|
|
|
memcpy(_encryptKey, key, 16);
|
|
|
|
|
#endif
|
2013-06-20 22:06:39 +01:00
|
|
|
select();
|
2020-06-02 12:43:09 +01:00
|
|
|
_spi->transfer(REG_AESKEY1 | 0x80);
|
2015-01-12 10:34:16 +00:00
|
|
|
for (uint8_t i = 0; i < 16; i++)
|
2020-06-02 12:43:09 +01:00
|
|
|
_spi->transfer(key[i]);
|
2013-06-20 22:06:39 +01:00
|
|
|
unselect();
|
|
|
|
|
}
|
2026-03-29 18:04:36 +01:00
|
|
|
writeReg(REG_PACKETCONFIG2,
|
|
|
|
|
(readReg(REG_PACKETCONFIG2) & 0xFE) | (validKey ? 1 : 0));
|
2013-06-20 22:06:39 +01:00
|
|
|
}
|
|
|
|
|
|
2015-05-19 20:08:41 +01:00
|
|
|
// get the received signal strength indicator (RSSI)
|
2015-01-12 10:34:16 +00:00
|
|
|
int16_t RFM69::readRSSI(bool forceTrigger) {
|
|
|
|
|
int16_t rssi = 0;
|
2023-08-13 02:29:01 +01:00
|
|
|
if (forceTrigger) {
|
2015-01-06 14:25:29 +00:00
|
|
|
// RSSI trigger not needed if DAGC is in continuous mode
|
2013-06-20 22:06:39 +01:00
|
|
|
writeReg(REG_RSSICONFIG, RF_RSSI_START);
|
2026-03-29 18:04:36 +01:00
|
|
|
while ((readReg(REG_RSSICONFIG) & RF_RSSI_DONE) == 0x00)
|
|
|
|
|
; // wait for RSSI_Ready
|
2013-06-20 22:06:39 +01:00
|
|
|
}
|
|
|
|
|
rssi = -readReg(REG_RSSIVALUE);
|
|
|
|
|
rssi >>= 1;
|
|
|
|
|
return rssi;
|
|
|
|
|
}
|
|
|
|
|
|
2023-08-13 02:29:01 +01:00
|
|
|
uint8_t RFM69::readReg(uint8_t addr) {
|
2013-06-20 22:06:39 +01:00
|
|
|
select();
|
2020-06-02 12:43:09 +01:00
|
|
|
_spi->transfer(addr & 0x7F);
|
|
|
|
|
uint8_t regval = _spi->transfer(0);
|
2013-06-20 22:06:39 +01:00
|
|
|
unselect();
|
|
|
|
|
return regval;
|
|
|
|
|
}
|
|
|
|
|
|
2023-08-13 02:29:01 +01:00
|
|
|
void RFM69::writeReg(uint8_t addr, uint8_t value) {
|
2013-06-20 22:06:39 +01:00
|
|
|
select();
|
2020-06-02 12:43:09 +01:00
|
|
|
_spi->transfer(addr | 0x80);
|
|
|
|
|
_spi->transfer(value);
|
2013-06-20 22:06:39 +01:00
|
|
|
unselect();
|
|
|
|
|
}
|
|
|
|
|
|
2015-05-19 20:08:41 +01:00
|
|
|
// select the RFM69 transceiver (save SPI settings, set CS low)
|
2013-06-20 22:06:39 +01:00
|
|
|
void RFM69::select() {
|
2026-03-29 18:04:36 +01:00
|
|
|
#if defined(SPCR) && defined(SPSR)
|
2016-03-01 02:21:52 +00:00
|
|
|
// save current SPI settings
|
|
|
|
|
_SPCR = SPCR;
|
|
|
|
|
_SPSR = SPSR;
|
|
|
|
|
#endif
|
2018-12-14 00:39:20 +00:00
|
|
|
|
|
|
|
|
#ifdef SPI_HAS_TRANSACTION
|
2020-06-02 12:43:09 +01:00
|
|
|
_spi->beginTransaction(_settings);
|
2020-01-21 17:57:21 +00:00
|
|
|
#else
|
|
|
|
|
// set RFM69 SPI settings explicitly
|
2020-06-02 12:43:09 +01:00
|
|
|
_spi->setDataMode(SPI_MODE0);
|
|
|
|
|
_spi->setBitOrder(MSBFIRST);
|
2026-03-29 18:04:36 +01:00
|
|
|
#if defined(__STM32F1__)
|
|
|
|
|
_spi->setClockDivider(SPI_CLOCK_DIV8);
|
|
|
|
|
#elif defined(__arm__)
|
|
|
|
|
_spi->setClockDivider(SPI_CLOCK_DIV16);
|
|
|
|
|
#else
|
|
|
|
|
_spi->setClockDivider(SPI_CLOCK_DIV2);
|
|
|
|
|
#endif
|
2018-01-26 00:35:46 +00:00
|
|
|
#endif
|
2013-06-20 22:06:39 +01:00
|
|
|
digitalWrite(_slaveSelectPin, LOW);
|
|
|
|
|
}
|
|
|
|
|
|
2015-05-19 20:08:41 +01:00
|
|
|
// unselect the RFM69 transceiver (set CS high, restore SPI settings)
|
2013-06-20 22:06:39 +01:00
|
|
|
void RFM69::unselect() {
|
|
|
|
|
digitalWrite(_slaveSelectPin, HIGH);
|
2018-12-14 00:39:20 +00:00
|
|
|
#ifdef SPI_HAS_TRANSACTION
|
2020-06-02 12:43:09 +01:00
|
|
|
_spi->endTransaction();
|
2026-03-29 18:04:36 +01:00
|
|
|
#endif
|
2015-01-06 14:25:29 +00:00
|
|
|
// restore SPI settings to what they were before talking to RFM69
|
2026-03-29 18:04:36 +01:00
|
|
|
#if defined(SPCR) && defined(SPSR)
|
2016-03-01 02:21:52 +00:00
|
|
|
SPCR = _SPCR;
|
|
|
|
|
SPSR = _SPSR;
|
2016-02-29 19:36:24 +00:00
|
|
|
#endif
|
2013-06-20 22:06:39 +01:00
|
|
|
}
|
|
|
|
|
|
2026-03-29 18:04:36 +01:00
|
|
|
// true = disable ID filtering to capture all packets on network, regardless of
|
|
|
|
|
// TARGETID false (default) = enable node/broadcast ID filtering to capture only
|
|
|
|
|
// frames sent to this/broadcast address
|
2020-01-21 17:52:45 +00:00
|
|
|
void RFM69::spyMode(bool onOff) {
|
|
|
|
|
_spyMode = onOff;
|
2026-03-29 18:04:36 +01:00
|
|
|
// writeReg(REG_PACKETCONFIG1, (readReg(REG_PACKETCONFIG1) & 0xF9) | (onOff ?
|
|
|
|
|
// RF_PACKET1_ADRSFILTERING_OFF : RF_PACKET1_ADRSFILTERING_NODEBROADCAST));
|
2013-06-20 22:06:39 +01:00
|
|
|
}
|
|
|
|
|
|
2026-03-29 18:04:36 +01:00
|
|
|
bool RFM69::getSpyMode() { return _spyMode; }
|
2025-01-03 14:12:16 +00:00
|
|
|
|
2026-03-29 18:04:36 +01:00
|
|
|
bool RFM69::isSyncOn() { return readReg(REG_SYNCCONFIG) >> 7; }
|
2025-01-03 14:12:16 +00:00
|
|
|
|
|
|
|
|
uint8_t RFM69::getSyncSize() {
|
|
|
|
|
return (readReg(REG_SYNCCONFIG) & 0b00111000) >> 3;
|
|
|
|
|
}
|
|
|
|
|
|
2026-03-29 18:04:36 +01:00
|
|
|
bool RFM69::isCrcOn() { return (readReg(REG_PACKETCONFIG1) & 0b00010000) >> 4; }
|
2025-01-03 14:12:16 +00:00
|
|
|
|
2026-03-29 18:04:36 +01:00
|
|
|
bool RFM69::isAesOn() { return readReg(REG_PACKETCONFIG2) & 0b00000001; }
|
2025-01-03 14:12:16 +00:00
|
|
|
|
2026-03-29 18:04:36 +01:00
|
|
|
// for RFM69 HW/HCW only: you must call setHighPower(true) after initialize() or
|
|
|
|
|
// else transmission won't work
|
2021-08-30 21:52:42 +01:00
|
|
|
void RFM69::setHighPower(bool _isRFM69HW_HCW) {
|
|
|
|
|
_isRFM69HW = _isRFM69HW_HCW;
|
2026-03-29 18:04:36 +01:00
|
|
|
writeReg(REG_OCP,
|
|
|
|
|
_isRFM69HW ? RF_OCP_OFF
|
|
|
|
|
: RF_OCP_ON); // disable OverCurrentProtection for HW/HCW
|
2021-08-30 21:52:42 +01:00
|
|
|
setPowerLevel(_powerLevel);
|
2013-06-20 22:06:39 +01:00
|
|
|
}
|
|
|
|
|
|
2026-03-29 18:04:36 +01:00
|
|
|
bool RFM69::isHighPower() { return _isRFM69HW; }
|
2025-01-03 14:12:16 +00:00
|
|
|
|
2021-08-30 21:52:42 +01:00
|
|
|
// internal function - for HW/HCW only:
|
|
|
|
|
// enables HiPower for 18-20dBm output
|
|
|
|
|
// should only be used with PA1+PA2
|
|
|
|
|
void RFM69::setHighPowerRegs(bool enable) {
|
2026-03-29 18:04:36 +01:00
|
|
|
if (!_isRFM69HW || _powerLevel < 20)
|
|
|
|
|
enable = false;
|
2021-08-30 21:52:42 +01:00
|
|
|
writeReg(REG_TESTPA1, enable ? 0x5D : 0x55);
|
|
|
|
|
writeReg(REG_TESTPA2, enable ? 0x7C : 0x70);
|
2013-06-20 22:06:39 +01:00
|
|
|
}
|
|
|
|
|
|
2026-03-29 18:04:36 +01:00
|
|
|
// set the slave select (CS) pin
|
2015-01-12 10:34:16 +00:00
|
|
|
void RFM69::setCS(uint8_t newSPISlaveSelect) {
|
2013-06-20 22:06:39 +01:00
|
|
|
_slaveSelectPin = newSPISlaveSelect;
|
2015-01-18 11:31:16 +00:00
|
|
|
digitalWrite(_slaveSelectPin, HIGH);
|
2013-06-20 22:06:39 +01:00
|
|
|
pinMode(_slaveSelectPin, OUTPUT);
|
|
|
|
|
}
|
|
|
|
|
|
2020-11-06 20:31:11 +00:00
|
|
|
// set the IRQ pin
|
2020-11-08 07:19:06 +00:00
|
|
|
bool RFM69::setIrq(uint8_t newIRQPin) {
|
2021-05-03 23:11:00 +01:00
|
|
|
uint8_t _newInterruptNum = digitalPinToInterrupt(newIRQPin);
|
2026-03-29 18:04:36 +01:00
|
|
|
if (_newInterruptNum == (uint8_t)NOT_AN_INTERRUPT)
|
|
|
|
|
return false;
|
2020-11-06 20:31:11 +00:00
|
|
|
#ifdef RF69_ATTACHINTERRUPT_TAKES_PIN_NUMBER
|
|
|
|
|
_newInterruptNum = newIRQPin;
|
|
|
|
|
#endif
|
|
|
|
|
|
|
|
|
|
// disconnect from existing IRQ pin
|
2026-03-29 18:04:36 +01:00
|
|
|
detachInterrupt(_interruptNum);
|
2020-11-06 20:31:11 +00:00
|
|
|
_interruptNum = _newInterruptNum;
|
|
|
|
|
attachInterrupt(_interruptNum, RFM69::isr0, RISING);
|
|
|
|
|
return true;
|
|
|
|
|
}
|
|
|
|
|
|
2025-01-03 12:22:35 +00:00
|
|
|
// for debugging
|
2015-08-23 03:13:20 +01:00
|
|
|
#define REGISTER_DETAIL 0
|
2014-11-12 04:05:36 +00:00
|
|
|
#if REGISTER_DETAIL
|
|
|
|
|
// SERIAL PRINT
|
|
|
|
|
// replace Serial.print("string") with SerialPrint("string")
|
|
|
|
|
#define SerialPrint(x) SerialPrint_P(PSTR(x))
|
2026-03-29 18:04:36 +01:00
|
|
|
void SerialWrite(uint8_t c) { Serial.write(c); }
|
2014-11-12 04:05:36 +00:00
|
|
|
|
2026-03-29 18:04:36 +01:00
|
|
|
void SerialPrint_P(PGM_P str, void (*f)(uint8_t) = SerialWrite) {
|
|
|
|
|
for (uint8_t c; (c = pgm_read_byte(str)); str++)
|
|
|
|
|
(*f)(c);
|
2014-11-12 04:05:36 +00:00
|
|
|
}
|
|
|
|
|
#endif
|
|
|
|
|
|
2023-08-13 02:29:01 +01:00
|
|
|
void RFM69::readAllRegs() {
|
2015-01-12 10:34:16 +00:00
|
|
|
uint8_t regVal;
|
2014-11-12 04:05:36 +00:00
|
|
|
|
2026-03-29 18:04:36 +01:00
|
|
|
#if REGISTER_DETAIL
|
2014-11-11 05:02:52 +00:00
|
|
|
int capVal;
|
2014-11-10 00:01:51 +00:00
|
|
|
|
2014-11-12 04:05:36 +00:00
|
|
|
//... State Variables for intelligent decoding
|
2015-08-23 02:03:51 +01:00
|
|
|
uint8_t modeFSK = 0;
|
2014-11-12 04:05:36 +00:00
|
|
|
int bitRate = 0;
|
|
|
|
|
int freqDev = 0;
|
|
|
|
|
long freqCenter = 0;
|
|
|
|
|
#endif
|
2026-03-29 18:04:36 +01:00
|
|
|
|
2015-08-23 03:13:20 +01:00
|
|
|
Serial.println("Address - HEX - BIN");
|
2023-08-13 02:29:01 +01:00
|
|
|
for (uint8_t regAddr = 1; regAddr <= 0x4F; regAddr++) {
|
2013-06-20 22:06:39 +01:00
|
|
|
select();
|
2020-06-02 12:43:09 +01:00
|
|
|
_spi->transfer(regAddr & 0x7F); // send address + r/w bit
|
|
|
|
|
regVal = _spi->transfer(0);
|
2013-06-20 22:06:39 +01:00
|
|
|
unselect();
|
|
|
|
|
|
|
|
|
|
Serial.print(regAddr, HEX);
|
|
|
|
|
Serial.print(" - ");
|
2025-01-03 12:22:35 +00:00
|
|
|
Serial.print(regVal, HEX);
|
2013-06-20 22:06:39 +01:00
|
|
|
Serial.print(" - ");
|
2025-01-03 12:22:35 +00:00
|
|
|
Serial.println(regVal, BIN);
|
2014-11-11 05:02:52 +00:00
|
|
|
|
2026-03-29 18:04:36 +01:00
|
|
|
#if REGISTER_DETAIL
|
|
|
|
|
switch (regAddr) {
|
|
|
|
|
case 0x1: {
|
|
|
|
|
SerialPrint("Controls the automatic Sequencer ( see section 4.2 "
|
|
|
|
|
")\nSequencerOff : ");
|
|
|
|
|
if (0x80 & regVal) {
|
|
|
|
|
SerialPrint("1 -> Mode is forced by the user\n");
|
|
|
|
|
} else {
|
|
|
|
|
SerialPrint("0 -> Operating mode as selected with Mode bits in "
|
|
|
|
|
"RegOpMode is automatically reached with the Sequencer\n");
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
SerialPrint("\nEnables Listen mode, should be enabled whilst in Standby "
|
|
|
|
|
"mode:\nListenOn : ");
|
|
|
|
|
if (0x40 & regVal) {
|
|
|
|
|
SerialPrint("1 -> On\n");
|
|
|
|
|
} else {
|
|
|
|
|
SerialPrint("0 -> Off ( see section 4.3)\n");
|
2023-08-13 02:29:01 +01:00
|
|
|
}
|
2026-03-29 18:04:36 +01:00
|
|
|
|
|
|
|
|
SerialPrint("\nAborts Listen mode when set together with ListenOn=0 See "
|
|
|
|
|
"section 4.3.4 for details (Always reads 0.)\n");
|
|
|
|
|
if (0x20 & regVal) {
|
|
|
|
|
SerialPrint("ERROR - ListenAbort should NEVER return 1 this is a write "
|
|
|
|
|
"only register\n");
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
SerialPrint("\nTransceiver's operating modes:\nMode : ");
|
|
|
|
|
capVal = (regVal >> 2) & 0x7;
|
|
|
|
|
if (capVal == 0b000) {
|
|
|
|
|
SerialPrint("000 -> Sleep mode (SLEEP)\n");
|
|
|
|
|
} else if (capVal == 0b001) {
|
|
|
|
|
SerialPrint("001 -> Standby mode (STDBY)\n");
|
|
|
|
|
} else if (capVal == 0b010) {
|
|
|
|
|
SerialPrint("010 -> Frequency Synthesizer mode (FS)\n");
|
|
|
|
|
} else if (capVal == 0b011) {
|
|
|
|
|
SerialPrint("011 -> Transmitter mode (TX)\n");
|
|
|
|
|
} else if (capVal == 0b100) {
|
|
|
|
|
SerialPrint("100 -> Receiver Mode (RX)\n");
|
|
|
|
|
} else {
|
|
|
|
|
Serial.print(capVal, BIN);
|
|
|
|
|
SerialPrint(" -> RESERVED\n");
|
|
|
|
|
}
|
|
|
|
|
SerialPrint("\n");
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
case 0x2: {
|
|
|
|
|
SerialPrint("Data Processing mode:\nDataMode : ");
|
|
|
|
|
capVal = (regVal >> 5) & 0x3;
|
|
|
|
|
if (capVal == 0b00) {
|
|
|
|
|
SerialPrint("00 -> Packet mode\n");
|
|
|
|
|
} else if (capVal == 0b01) {
|
|
|
|
|
SerialPrint("01 -> reserved\n");
|
|
|
|
|
} else if (capVal == 0b10) {
|
|
|
|
|
SerialPrint("10 -> Continuous mode with bit synchronizer\n");
|
|
|
|
|
} else if (capVal == 0b11) {
|
|
|
|
|
SerialPrint("11 -> Continuous mode without bit synchronizer\n");
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
SerialPrint("\nModulation scheme:\nModulation Type : ");
|
|
|
|
|
capVal = (regVal >> 3) & 0x3;
|
|
|
|
|
if (capVal == 0b00) {
|
|
|
|
|
SerialPrint("00 -> FSK\n");
|
|
|
|
|
modeFSK = 1;
|
|
|
|
|
} else if (capVal == 0b01) {
|
|
|
|
|
SerialPrint("01 -> OOK\n");
|
|
|
|
|
} else if (capVal == 0b10) {
|
|
|
|
|
SerialPrint("10 -> reserved\n");
|
|
|
|
|
} else if (capVal == 0b11) {
|
|
|
|
|
SerialPrint("11 -> reserved\n");
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
SerialPrint("\nData shaping: ");
|
|
|
|
|
if (modeFSK) {
|
|
|
|
|
SerialPrint("in FSK:\n");
|
|
|
|
|
} else {
|
|
|
|
|
SerialPrint("in OOK:\n");
|
|
|
|
|
}
|
|
|
|
|
SerialPrint("ModulationShaping : ");
|
|
|
|
|
capVal = regVal & 0x3;
|
|
|
|
|
if (modeFSK) {
|
2023-08-13 02:29:01 +01:00
|
|
|
if (capVal == 0b00) {
|
2026-03-29 18:04:36 +01:00
|
|
|
SerialPrint("00 -> no shaping\n");
|
2023-08-13 02:29:01 +01:00
|
|
|
} else if (capVal == 0b01) {
|
2026-03-29 18:04:36 +01:00
|
|
|
SerialPrint("01 -> Gaussian filter, BT = 1.0\n");
|
2023-08-13 02:29:01 +01:00
|
|
|
} else if (capVal == 0b10) {
|
2026-03-29 18:04:36 +01:00
|
|
|
SerialPrint("10 -> Gaussian filter, BT = 0.5\n");
|
2023-08-13 02:29:01 +01:00
|
|
|
} else if (capVal == 0b11) {
|
2026-03-29 18:04:36 +01:00
|
|
|
SerialPrint("11 -> Gaussian filter, BT = 0.3\n");
|
2014-11-12 04:05:36 +00:00
|
|
|
}
|
2026-03-29 18:04:36 +01:00
|
|
|
} else {
|
2023-08-13 02:29:01 +01:00
|
|
|
if (capVal == 0b00) {
|
2026-03-29 18:04:36 +01:00
|
|
|
SerialPrint("00 -> no shaping\n");
|
2023-08-13 02:29:01 +01:00
|
|
|
} else if (capVal == 0b01) {
|
2026-03-29 18:04:36 +01:00
|
|
|
SerialPrint("01 -> filtering with f(cutoff) = BR\n");
|
2023-08-13 02:29:01 +01:00
|
|
|
} else if (capVal == 0b10) {
|
2026-03-29 18:04:36 +01:00
|
|
|
SerialPrint("10 -> filtering with f(cutoff) = 2*BR\n");
|
2023-08-13 02:29:01 +01:00
|
|
|
} else if (capVal == 0b11) {
|
2026-03-29 18:04:36 +01:00
|
|
|
SerialPrint("ERROR - 11 is reserved\n");
|
2014-11-12 04:05:36 +00:00
|
|
|
}
|
2023-08-13 02:29:01 +01:00
|
|
|
}
|
2026-03-29 18:04:36 +01:00
|
|
|
|
|
|
|
|
SerialPrint("\n");
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
case 0x3: {
|
|
|
|
|
bitRate = (regVal << 8);
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
case 0x4: {
|
|
|
|
|
bitRate |= regVal;
|
|
|
|
|
SerialPrint("Bit Rate (Chip Rate when Manchester encoding is "
|
|
|
|
|
"enabled)\nBitRate : ");
|
|
|
|
|
unsigned long val = 32UL * 1000UL * 1000UL / bitRate;
|
|
|
|
|
Serial.println(val);
|
|
|
|
|
SerialPrint("\n");
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
case 0x5: {
|
|
|
|
|
freqDev = ((regVal & 0x3f) << 8);
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
case 0x6: {
|
|
|
|
|
freqDev |= regVal;
|
|
|
|
|
SerialPrint("Frequency deviation\nFdev : ");
|
|
|
|
|
unsigned long val = RF69_FSTEP * freqDev;
|
|
|
|
|
Serial.println(val);
|
|
|
|
|
SerialPrint("\n");
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
case 0x7: {
|
|
|
|
|
unsigned long tempVal = regVal;
|
|
|
|
|
freqCenter = (tempVal << 16);
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
case 0x8: {
|
|
|
|
|
unsigned long tempVal = regVal;
|
|
|
|
|
freqCenter = freqCenter | (tempVal << 8);
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
case 0x9: {
|
|
|
|
|
freqCenter = freqCenter | regVal;
|
|
|
|
|
SerialPrint("RF Carrier frequency\nFRF : ");
|
|
|
|
|
unsigned long val = RF69_FSTEP * freqCenter;
|
|
|
|
|
Serial.println(val);
|
|
|
|
|
SerialPrint("\n");
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
case 0xa: {
|
|
|
|
|
SerialPrint("RC calibration control & status\nRcCalDone : ");
|
|
|
|
|
if (0x40 & regVal) {
|
|
|
|
|
SerialPrint("1 -> RC calibration is over\n");
|
|
|
|
|
} else {
|
|
|
|
|
SerialPrint("0 -> RC calibration is in progress\n");
|
2023-08-13 02:29:01 +01:00
|
|
|
}
|
|
|
|
|
|
2026-03-29 18:04:36 +01:00
|
|
|
SerialPrint("\n");
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
case 0xb: {
|
|
|
|
|
SerialPrint(
|
|
|
|
|
"Improved AFC routine for signals with modulation index lower than "
|
|
|
|
|
"2. Refer to section 3.4.16 for details\nAfcLowBetaOn : ");
|
|
|
|
|
if (0x20 & regVal) {
|
|
|
|
|
SerialPrint("1 -> Improved AFC routine\n");
|
|
|
|
|
} else {
|
|
|
|
|
SerialPrint("0 -> Standard AFC routine\n");
|
2023-08-13 02:29:01 +01:00
|
|
|
}
|
2026-03-29 18:04:36 +01:00
|
|
|
SerialPrint("\n");
|
|
|
|
|
break;
|
|
|
|
|
}
|
2023-08-13 02:29:01 +01:00
|
|
|
|
2026-03-29 18:04:36 +01:00
|
|
|
case 0xc: {
|
|
|
|
|
SerialPrint("Reserved\n\n");
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
case 0xd: {
|
|
|
|
|
byte val;
|
|
|
|
|
SerialPrint("Resolution of Listen mode Idle time (calibrated RC "
|
|
|
|
|
"osc):\nListenResolIdle : ");
|
|
|
|
|
val = regVal >> 6;
|
|
|
|
|
if (val == 0b00) {
|
|
|
|
|
SerialPrint("00 -> reserved\n");
|
|
|
|
|
} else if (val == 0b01) {
|
|
|
|
|
SerialPrint("01 -> 64 us\n");
|
|
|
|
|
} else if (val == 0b10) {
|
|
|
|
|
SerialPrint("10 -> 4.1 ms\n");
|
|
|
|
|
} else if (val == 0b11) {
|
|
|
|
|
SerialPrint("11 -> 262 ms\n");
|
2023-08-13 02:29:01 +01:00
|
|
|
}
|
|
|
|
|
|
2026-03-29 18:04:36 +01:00
|
|
|
SerialPrint("\nResolution of Listen mode Rx time (calibrated RC "
|
|
|
|
|
"osc):\nListenResolRx : ");
|
|
|
|
|
val = (regVal >> 4) & 0x3;
|
|
|
|
|
if (val == 0b00) {
|
|
|
|
|
SerialPrint("00 -> reserved\n");
|
|
|
|
|
} else if (val == 0b01) {
|
|
|
|
|
SerialPrint("01 -> 64 us\n");
|
|
|
|
|
} else if (val == 0b10) {
|
|
|
|
|
SerialPrint("10 -> 4.1 ms\n");
|
|
|
|
|
} else if (val == 0b11) {
|
|
|
|
|
SerialPrint("11 -> 262 ms\n");
|
2023-08-13 02:29:01 +01:00
|
|
|
}
|
2026-03-29 18:04:36 +01:00
|
|
|
|
|
|
|
|
SerialPrint("\nCriteria for packet acceptance in Listen "
|
|
|
|
|
"mode:\nListenCriteria : ");
|
|
|
|
|
if (0x8 & regVal) {
|
|
|
|
|
SerialPrint("1 -> signal strength is above RssiThreshold and "
|
|
|
|
|
"SyncAddress matched\n");
|
|
|
|
|
} else {
|
|
|
|
|
SerialPrint("0 -> signal strength is above RssiThreshold\n");
|
2023-08-13 02:29:01 +01:00
|
|
|
}
|
|
|
|
|
|
2026-03-29 18:04:36 +01:00
|
|
|
SerialPrint("\nAction taken after acceptance of a packet in Listen "
|
|
|
|
|
"mode:\nListenEnd : ");
|
|
|
|
|
val = (regVal >> 1) & 0x3;
|
|
|
|
|
if (val == 0b00) {
|
|
|
|
|
SerialPrint("00 -> chip stays in Rx mode. Listen mode stops and must "
|
|
|
|
|
"be disabled (see section 4.3)\n");
|
|
|
|
|
} else if (val == 0b01) {
|
|
|
|
|
SerialPrint(
|
|
|
|
|
"01 -> chip stays in Rx mode until PayloadReady or Timeout "
|
|
|
|
|
"interrupt occurs. It then goes to the mode defined by Mode. "
|
|
|
|
|
"Listen mode stops and must be disabled (see section 4.3)\n");
|
|
|
|
|
} else if (val == 0b10) {
|
|
|
|
|
SerialPrint("10 -> chip stays in Rx mode until PayloadReady or Timeout "
|
|
|
|
|
"occurs. Listen mode then resumes in Idle state. FIFO "
|
|
|
|
|
"content is lost at next Rx wakeup.\n");
|
|
|
|
|
} else if (val == 0b11) {
|
|
|
|
|
SerialPrint("11 -> Reserved\n");
|
|
|
|
|
}
|
2014-11-12 04:05:36 +00:00
|
|
|
|
2026-03-29 18:04:36 +01:00
|
|
|
SerialPrint("\n");
|
|
|
|
|
break;
|
|
|
|
|
}
|
2023-08-13 02:29:01 +01:00
|
|
|
|
2026-03-29 18:04:36 +01:00
|
|
|
default: {
|
|
|
|
|
}
|
2014-11-11 05:02:52 +00:00
|
|
|
}
|
|
|
|
|
#endif
|
2015-01-06 13:46:04 +00:00
|
|
|
}
|
2013-06-20 22:06:39 +01:00
|
|
|
unselect();
|
|
|
|
|
}
|
|
|
|
|
|
2017-07-24 18:41:41 +01:00
|
|
|
void RFM69::readAllRegsCompact() {
|
|
|
|
|
// Print the header row and first register entry
|
2026-03-29 18:04:36 +01:00
|
|
|
Serial.println();
|
|
|
|
|
Serial.print(" ");
|
2025-01-03 12:22:35 +00:00
|
|
|
for (uint8_t reg = 0x00; reg < 0x10; reg++) {
|
2017-07-24 18:41:41 +01:00
|
|
|
Serial.print(reg, HEX);
|
|
|
|
|
Serial.print(" ");
|
|
|
|
|
}
|
|
|
|
|
Serial.println();
|
|
|
|
|
Serial.print("00: -- ");
|
|
|
|
|
|
|
|
|
|
// Loop over the registers from 0x01 to 0x7F and print their values
|
2025-01-03 12:22:35 +00:00
|
|
|
for (uint8_t reg = 0x01; reg < 0x80; reg++) {
|
2026-03-29 18:04:36 +01:00
|
|
|
if (reg % 16 == 0) { // Print the header column entries
|
2017-07-24 18:41:41 +01:00
|
|
|
Serial.println();
|
2025-01-03 12:22:35 +00:00
|
|
|
Serial.print(reg, HEX);
|
2017-07-24 18:41:41 +01:00
|
|
|
Serial.print(": ");
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
// Print the actual register values
|
2025-01-03 12:22:35 +00:00
|
|
|
uint8_t ret = readReg(reg);
|
2026-03-29 18:04:36 +01:00
|
|
|
if (ret < 0x10)
|
|
|
|
|
Serial.print("0"); // Handle values less than 10
|
2025-01-03 12:22:35 +00:00
|
|
|
Serial.print(ret, HEX);
|
2017-07-24 18:41:41 +01:00
|
|
|
Serial.print(" ");
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
2023-08-13 02:29:01 +01:00
|
|
|
uint8_t RFM69::readTemperature(uint8_t calFactor) { // returns centigrade
|
2013-09-06 00:32:11 +01:00
|
|
|
setMode(RF69_MODE_STANDBY);
|
|
|
|
|
writeReg(REG_TEMP1, RF_TEMP1_MEAS_START);
|
2026-03-29 18:04:36 +01:00
|
|
|
while ((readReg(REG_TEMP1) & RF_TEMP1_MEAS_RUNNING))
|
|
|
|
|
;
|
|
|
|
|
return ~readReg(REG_TEMP2) + COURSE_TEMP_COEF +
|
|
|
|
|
calFactor; // 'complement' corrects the slope, rising temp = rising val
|
|
|
|
|
} // COURSE_TEMP_COEF puts reading in the ballpark, user can add additional
|
|
|
|
|
// correction
|
2013-09-06 00:32:11 +01:00
|
|
|
|
2023-08-13 02:29:01 +01:00
|
|
|
void RFM69::rcCalibration() {
|
2013-09-06 00:32:11 +01:00
|
|
|
writeReg(REG_OSC1, RF_OSC1_RCCAL_START);
|
2026-03-29 18:04:36 +01:00
|
|
|
while ((readReg(REG_OSC1) & RF_OSC1_RCCAL_DONE) == 0x00)
|
|
|
|
|
;
|
2016-06-04 19:22:45 +01:00
|
|
|
}
|
|
|
|
|
|
2021-07-20 18:58:25 +01:00
|
|
|
//===================================================================================================================
|
|
|
|
|
// radio300KBPS() - switch radio to max bitrate
|
|
|
|
|
//===================================================================================================================
|
|
|
|
|
void RFM69::set300KBPS() {
|
2026-03-29 18:04:36 +01:00
|
|
|
writeReg(0x03, 0x00); // REG_BITRATEMSB: 300kbps (0x006B, see DS p20)
|
|
|
|
|
writeReg(0x04, 0x6B); // REG_BITRATELSB: 300kbps (0x006B, see DS p20)
|
|
|
|
|
writeReg(0x19, 0x40); // REG_RXBW: 500kHz
|
|
|
|
|
writeReg(0x1A, 0x80); // REG_AFCBW: 500kHz
|
|
|
|
|
writeReg(0x05, 0x13); // REG_FDEVMSB: 300khz (0x1333)
|
|
|
|
|
writeReg(0x06, 0x33); // REG_FDEVLSB: 300khz (0x1333)
|
|
|
|
|
writeReg(0x29, 240); // set REG_RSSITHRESH to -120dBm
|
|
|
|
|
writeReg(0x37, 0b10010000); // DC=WHITENING, CRCAUTOOFF=0
|
2022-02-07 19:19:22 +00:00
|
|
|
// ^^->DC: 00=none, 01=manchester, 10=whitening
|
2021-07-20 18:58:25 +01:00
|
|
|
}
|
|
|
|
|
|
2021-08-30 21:52:42 +01:00
|
|
|
//=============================================================================
|
|
|
|
|
// setLNA() - disable the AGC and set a manual gain to attenuate input signal
|
|
|
|
|
// Makes receiver hear a "weaker" signal.
|
|
|
|
|
// Use this function to simulate a receiver "distance" from a transmitter
|
|
|
|
|
// newReg should be: (see table 26 RegLna 0x18 values)
|
2026-03-29 18:04:36 +01:00
|
|
|
// 000 - gain set by the internal AGC loop (when bits
|
2021-08-30 21:52:42 +01:00
|
|
|
// 001 - G1 = highest gain
|
|
|
|
|
// 010 - G2 = highest gain 6 dB
|
|
|
|
|
// 011 - G3 = highest gain 12 dB
|
|
|
|
|
// 100 - G4 = highest gain 24 dB
|
|
|
|
|
// 101 - G5 = highest gain 36 dB
|
|
|
|
|
// 110 - G6 = highest gain 48 dB
|
|
|
|
|
// 111 - reserved
|
|
|
|
|
//=============================================================================
|
|
|
|
|
uint8_t RFM69::setLNA(uint8_t newReg) {
|
|
|
|
|
byte oldReg;
|
|
|
|
|
oldReg = readReg(REG_LNA);
|
2026-03-29 18:04:36 +01:00
|
|
|
writeReg(REG_LNA, ((newReg & 7) |
|
|
|
|
|
(oldReg & ~7))); // just control the LNA Gain bits for now
|
|
|
|
|
return oldReg; // return the original value in case we need to restore it
|
2021-08-30 21:52:42 +01:00
|
|
|
}
|
|
|
|
|
|
2020-09-29 01:09:43 +01:00
|
|
|
// ListenMode sleep/timer - see ListenModeSleep example for proper usage!
|
2023-08-13 02:29:01 +01:00
|
|
|
void RFM69::listenModeSleep(uint16_t millisInterval) {
|
2026-03-29 18:04:36 +01:00
|
|
|
setMode(RF69_MODE_STANDBY);
|
|
|
|
|
while ((readReg(REG_IRQFLAGS1) & RF_IRQFLAGS1_MODEREADY) == 0x00)
|
|
|
|
|
; // wait for ModeReady
|
2020-05-18 18:54:21 +01:00
|
|
|
|
2026-03-29 18:04:36 +01:00
|
|
|
detachInterrupt(_interruptNum);
|
|
|
|
|
// attachInterrupt( _interruptNum, delayIrq, RISING);
|
2025-01-03 12:22:35 +00:00
|
|
|
writeReg(REG_DIOMAPPING1, RF_DIOMAPPING1_DIO0_11);
|
|
|
|
|
writeReg(REG_BITRATEMSB, RF_BITRATEMSB_200000);
|
|
|
|
|
writeReg(REG_BITRATELSB, RF_BITRATELSB_200000);
|
|
|
|
|
writeReg(REG_FDEVMSB, RF_FDEVMSB_100000);
|
|
|
|
|
writeReg(REG_FDEVLSB, RF_FDEVLSB_100000);
|
|
|
|
|
writeReg(REG_RXBW, RF_RXBW_DCCFREQ_000 | RF_RXBW_MANT_16 | RF_RXBW_EXP_0);
|
2020-05-18 18:54:21 +01:00
|
|
|
|
|
|
|
|
uint8_t idleResol;
|
|
|
|
|
uint32_t divisor;
|
|
|
|
|
uint32_t microInterval = millisInterval * 1000L;
|
|
|
|
|
|
2026-03-29 18:04:36 +01:00
|
|
|
if (microInterval > 255 * 4100L) {
|
2020-05-18 18:54:21 +01:00
|
|
|
idleResol = RF_LISTEN1_RESOL_IDLE_262000;
|
|
|
|
|
divisor = 262000;
|
2026-03-29 18:04:36 +01:00
|
|
|
} else if (microInterval > 255 * 64L) {
|
2020-05-18 18:54:21 +01:00
|
|
|
idleResol = RF_LISTEN1_RESOL_IDLE_4100;
|
|
|
|
|
divisor = 4100;
|
2023-08-13 02:29:01 +01:00
|
|
|
} else {
|
2020-05-18 18:54:21 +01:00
|
|
|
idleResol = RF_LISTEN1_RESOL_IDLE_64;
|
|
|
|
|
divisor = 64;
|
|
|
|
|
}
|
|
|
|
|
|
2026-03-29 18:04:36 +01:00
|
|
|
writeReg(REG_LISTEN1, RF_LISTEN1_RESOL_RX_64 | idleResol |
|
|
|
|
|
RF_LISTEN1_CRITERIA_RSSI | RF_LISTEN1_END_10);
|
|
|
|
|
writeReg(REG_LISTEN2, (microInterval + (divisor >> 1)) / divisor);
|
2025-01-03 12:22:35 +00:00
|
|
|
writeReg(REG_LISTEN3, 4);
|
|
|
|
|
writeReg(REG_RSSITHRESH, 255);
|
|
|
|
|
writeReg(REG_RXTIMEOUT2, 1);
|
2026-03-29 18:04:36 +01:00
|
|
|
writeReg(REG_OPMODE, RF_OPMODE_SEQUENCER_ON | RF_OPMODE_STANDBY);
|
|
|
|
|
writeReg(REG_OPMODE,
|
|
|
|
|
RF_OPMODE_SEQUENCER_ON | RF_OPMODE_STANDBY | RF_OPMODE_LISTEN_ON);
|
2025-01-03 12:22:35 +00:00
|
|
|
attachInterrupt(_interruptNum, delayIrq, RISING);
|
2026-03-29 18:04:36 +01:00
|
|
|
// must call sleep + interrupt handler 3 times here, then endListenModeSleep()
|
|
|
|
|
// - see ListenModeSleep example!
|
2020-05-18 18:54:21 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
//=============================================================================
|
|
|
|
|
// endListenModeSleep() - called by listenModeSleep()
|
|
|
|
|
//=============================================================================
|
2023-08-13 02:29:01 +01:00
|
|
|
void RFM69::endListenModeSleep() {
|
2026-03-29 18:04:36 +01:00
|
|
|
detachInterrupt(_interruptNum);
|
|
|
|
|
writeReg(REG_OPMODE,
|
|
|
|
|
RF_OPMODE_SEQUENCER_ON | RF_OPMODE_LISTENABORT | RF_OPMODE_STANDBY);
|
2025-01-03 12:22:35 +00:00
|
|
|
writeReg(REG_OPMODE, RF_OPMODE_SEQUENCER_ON | RF_OPMODE_STANDBY);
|
|
|
|
|
writeReg(REG_RXTIMEOUT2, 0);
|
|
|
|
|
setMode(RF69_MODE_STANDBY);
|
2026-03-29 18:04:36 +01:00
|
|
|
while ((readReg(REG_IRQFLAGS1) & RF_IRQFLAGS1_MODEREADY) == 0x00)
|
|
|
|
|
; // wait for ModeReady
|
2020-05-18 18:54:21 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
//=============================================================================
|
|
|
|
|
// delayIRQ() - called by listenModeSleep()
|
|
|
|
|
//=============================================================================
|
|
|
|
|
void RFM69::delayIrq() { return; }
|
|
|
|
|
|
2018-04-05 21:20:12 +01:00
|
|
|
//=============================================================================
|
2026-03-29 18:04:36 +01:00
|
|
|
// ListenMode specific functions
|
2018-04-05 21:20:12 +01:00
|
|
|
//=============================================================================
|
|
|
|
|
#if defined(RF69_LISTENMODE_ENABLE)
|
2026-03-29 18:04:36 +01:00
|
|
|
RFM69 *RFM69::selfPointer = 0;
|
2018-04-05 21:20:12 +01:00
|
|
|
volatile uint16_t RFM69::RF69_LISTEN_BURST_REMAINING_MS = 0;
|
|
|
|
|
|
|
|
|
|
//=============================================================================
|
|
|
|
|
// reinitRadio() - use base class initialization with saved values
|
|
|
|
|
//=============================================================================
|
2023-08-13 02:29:01 +01:00
|
|
|
bool RFM69::reinitRadio() {
|
2021-09-19 02:38:01 +01:00
|
|
|
bool haveEncryptKey = _haveEncryptKey;
|
2026-03-29 18:04:36 +01:00
|
|
|
if (!initialize(_freqBand, _address, _networkID))
|
|
|
|
|
return false;
|
|
|
|
|
if (haveEncryptKey)
|
|
|
|
|
encrypt(_encryptKey); // Restore the encryption key if necessary
|
|
|
|
|
if (_isHighSpeed)
|
|
|
|
|
writeReg(REG_LNA, (readReg(REG_LNA) & ~0x3) | RF_LNA_GAINSELECT_AUTO);
|
2018-04-05 21:20:12 +01:00
|
|
|
return true;
|
|
|
|
|
}
|
|
|
|
|
|
2023-08-13 02:29:01 +01:00
|
|
|
static uint32_t getUsForResolution(uint8_t resolution) {
|
2018-04-05 21:20:12 +01:00
|
|
|
switch (resolution) {
|
2026-03-29 18:04:36 +01:00
|
|
|
case RF_LISTEN1_RESOL_RX_64:
|
|
|
|
|
case RF_LISTEN1_RESOL_IDLE_64:
|
|
|
|
|
return 64;
|
|
|
|
|
case RF_LISTEN1_RESOL_RX_4100:
|
|
|
|
|
case RF_LISTEN1_RESOL_IDLE_4100:
|
|
|
|
|
return 4100;
|
|
|
|
|
case RF_LISTEN1_RESOL_RX_262000:
|
|
|
|
|
case RF_LISTEN1_RESOL_IDLE_262000:
|
|
|
|
|
return 262000;
|
|
|
|
|
default:
|
|
|
|
|
// Whoops
|
|
|
|
|
return 0;
|
2018-04-05 21:20:12 +01:00
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
2023-08-13 02:29:01 +01:00
|
|
|
static uint32_t getCoefForResolution(uint8_t resolution, uint32_t duration) {
|
2018-04-05 21:20:12 +01:00
|
|
|
uint32_t resolDuration = getUsForResolution(resolution);
|
|
|
|
|
uint32_t result = duration / resolDuration;
|
|
|
|
|
|
|
|
|
|
// If the next-higher coefficient is closer, use that
|
2026-03-29 18:04:36 +01:00
|
|
|
if (abs(duration - ((result + 1) * resolDuration)) <
|
|
|
|
|
abs(duration - (result * resolDuration)))
|
2018-04-05 21:20:12 +01:00
|
|
|
return result + 1;
|
|
|
|
|
|
|
|
|
|
return result;
|
|
|
|
|
}
|
|
|
|
|
|
2026-03-29 18:04:36 +01:00
|
|
|
static bool chooseResolutionAndCoef(uint8_t *resolutions, uint32_t duration,
|
|
|
|
|
uint8_t &resolOut, uint8_t &coefOut) {
|
2018-04-05 21:20:12 +01:00
|
|
|
for (int i = 0; resolutions[i]; i++) {
|
|
|
|
|
uint32_t coef = getCoefForResolution(resolutions[i], duration);
|
|
|
|
|
if (coef <= 255) {
|
|
|
|
|
coefOut = coef;
|
|
|
|
|
resolOut = resolutions[i];
|
|
|
|
|
return true;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
// out of range
|
|
|
|
|
return false;
|
|
|
|
|
}
|
|
|
|
|
|
2026-03-29 18:04:36 +01:00
|
|
|
bool RFM69::listenModeSetDurations(uint32_t &rxDuration,
|
|
|
|
|
uint32_t &idleDuration) {
|
|
|
|
|
uint8_t rxResolutions[] = {RF_LISTEN1_RESOL_RX_64, RF_LISTEN1_RESOL_RX_4100,
|
|
|
|
|
RF_LISTEN1_RESOL_RX_262000, 0};
|
|
|
|
|
uint8_t idleResolutions[] = {RF_LISTEN1_RESOL_IDLE_64,
|
|
|
|
|
RF_LISTEN1_RESOL_IDLE_4100,
|
|
|
|
|
RF_LISTEN1_RESOL_IDLE_262000, 0};
|
2018-04-05 21:20:12 +01:00
|
|
|
|
2026-03-29 18:04:36 +01:00
|
|
|
if (!chooseResolutionAndCoef(rxResolutions, rxDuration, _rxListenResolution,
|
|
|
|
|
_rxListenCoef))
|
2018-04-05 21:20:12 +01:00
|
|
|
return false;
|
|
|
|
|
|
2026-03-29 18:04:36 +01:00
|
|
|
if (!chooseResolutionAndCoef(idleResolutions, idleDuration,
|
|
|
|
|
_idleListenResolution, _idleListenCoef))
|
2018-04-05 21:20:12 +01:00
|
|
|
return false;
|
|
|
|
|
|
|
|
|
|
rxDuration = getUsForResolution(_rxListenResolution) * _rxListenCoef;
|
|
|
|
|
idleDuration = getUsForResolution(_idleListenResolution) * _idleListenCoef;
|
|
|
|
|
_listenCycleDurationUs = rxDuration + idleDuration;
|
|
|
|
|
|
|
|
|
|
return true;
|
|
|
|
|
}
|
|
|
|
|
|
2026-03-29 18:04:36 +01:00
|
|
|
void RFM69::listenModeGetDurations(uint32_t &rxDuration,
|
|
|
|
|
uint32_t &idleDuration) {
|
2018-04-05 21:20:12 +01:00
|
|
|
rxDuration = getUsForResolution(_rxListenResolution) * _rxListenCoef;
|
|
|
|
|
idleDuration = getUsForResolution(_idleListenResolution) * _idleListenCoef;
|
|
|
|
|
}
|
|
|
|
|
|
2023-08-13 02:29:01 +01:00
|
|
|
void RFM69::listenModeReset(void) {
|
2018-04-05 21:20:12 +01:00
|
|
|
DATALEN = 0;
|
|
|
|
|
SENDERID = 0;
|
|
|
|
|
TARGETID = 0;
|
|
|
|
|
PAYLOADLEN = 0;
|
|
|
|
|
ACK_REQUESTED = 0;
|
|
|
|
|
ACK_RECEIVED = 0;
|
|
|
|
|
RF69_LISTEN_BURST_REMAINING_MS = 0;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
//=============================================================================
|
2026-03-29 18:04:36 +01:00
|
|
|
// irq handler, simply calls listenModeInterruptHandler method so internal
|
|
|
|
|
// methods can be accessed easily
|
2018-04-05 21:20:12 +01:00
|
|
|
//=============================================================================
|
2026-03-29 18:04:36 +01:00
|
|
|
ISR_PREFIX void RFM69::listenModeIrq() {
|
|
|
|
|
selfPointer->listenModeInterruptHandler();
|
|
|
|
|
}
|
2018-04-05 21:20:12 +01:00
|
|
|
|
|
|
|
|
//=============================================================================
|
|
|
|
|
// listenModeInterruptHandler() - only called by listen irq handler
|
|
|
|
|
//=============================================================================
|
2023-08-13 02:29:01 +01:00
|
|
|
void RFM69::listenModeInterruptHandler(void) {
|
2026-03-29 18:04:36 +01:00
|
|
|
if (DATALEN != 0)
|
|
|
|
|
return;
|
2018-04-05 21:20:12 +01:00
|
|
|
|
|
|
|
|
listenModeReset();
|
|
|
|
|
noInterrupts();
|
|
|
|
|
select();
|
|
|
|
|
|
2026-03-29 18:04:36 +01:00
|
|
|
union { // union to simplify addressing of long and short parts of time offset
|
2018-04-05 21:20:12 +01:00
|
|
|
uint32_t l;
|
2026-03-29 18:04:36 +01:00
|
|
|
uint8_t b[4];
|
2018-04-05 21:20:12 +01:00
|
|
|
} burstRemaining;
|
|
|
|
|
|
|
|
|
|
burstRemaining.l = 0;
|
|
|
|
|
|
2020-06-02 12:43:09 +01:00
|
|
|
_spi->transfer(REG_FIFO & 0x7F);
|
|
|
|
|
PAYLOADLEN = _spi->transfer(0);
|
2018-04-05 21:20:12 +01:00
|
|
|
PAYLOADLEN = PAYLOADLEN > 64 ? 64 : PAYLOADLEN; // precaution
|
2020-06-02 12:43:09 +01:00
|
|
|
TARGETID = _spi->transfer(0);
|
2026-03-29 18:04:36 +01:00
|
|
|
if (!(_spyMode || TARGETID == _address ||
|
|
|
|
|
TARGETID ==
|
|
|
|
|
RF69_BROADCAST_ADDR) // match this node's address, or broadcast
|
|
|
|
|
// address or anything in spy mode
|
|
|
|
|
|| PAYLOADLEN < 3) // address situation could receive packets that are
|
|
|
|
|
// malformed and don't fit this library's extra fields
|
2018-04-05 21:20:12 +01:00
|
|
|
{
|
|
|
|
|
listenModeReset();
|
|
|
|
|
goto out;
|
|
|
|
|
}
|
|
|
|
|
|
2026-03-29 18:04:36 +01:00
|
|
|
// We've read the target, and will read the sender id and two time offset
|
|
|
|
|
// bytes for a total of 4 bytes
|
2018-04-05 21:20:12 +01:00
|
|
|
DATALEN = PAYLOADLEN - 4;
|
2020-12-19 08:27:35 +00:00
|
|
|
SENDERID = _spi->transfer(0);
|
2026-03-29 18:04:36 +01:00
|
|
|
burstRemaining.b[0] = _spi->transfer(0); // and get the time remaining
|
|
|
|
|
burstRemaining.b[1] = _spi->transfer(0);
|
2018-04-05 21:20:12 +01:00
|
|
|
RF69_LISTEN_BURST_REMAINING_MS = burstRemaining.l;
|
|
|
|
|
|
|
|
|
|
for (uint8_t i = 0; i < DATALEN; i++)
|
2020-06-02 12:43:09 +01:00
|
|
|
DATA[i] = _spi->transfer(0);
|
2018-04-05 21:20:12 +01:00
|
|
|
|
|
|
|
|
if (DATALEN < RF69_MAX_DATA_LEN)
|
|
|
|
|
DATA[DATALEN] = 0; // add null at end of string
|
|
|
|
|
|
|
|
|
|
out:
|
|
|
|
|
unselect();
|
|
|
|
|
interrupts();
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
//=============================================================================
|
|
|
|
|
// listenModeStart() - switch radio to Listen Mode in prep for sleep until burst
|
|
|
|
|
//=============================================================================
|
2023-08-13 02:29:01 +01:00
|
|
|
void RFM69::listenModeStart(void) {
|
2026-03-29 18:04:36 +01:00
|
|
|
while (readReg(REG_IRQFLAGS2) & RF_IRQFLAGS2_PACKETSENT == 0x00)
|
|
|
|
|
; // wait for ModeReady
|
2018-04-05 21:20:12 +01:00
|
|
|
listenModeReset();
|
|
|
|
|
|
|
|
|
|
detachInterrupt(_interruptNum);
|
|
|
|
|
attachInterrupt(_interruptNum, listenModeIrq, RISING);
|
|
|
|
|
setMode(RF69_MODE_STANDBY);
|
|
|
|
|
writeReg(REG_DIOMAPPING1, RF_DIOMAPPING1_DIO0_01);
|
|
|
|
|
writeReg(REG_FRFMSB, readReg(REG_FRFMSB) + 1);
|
2026-03-29 18:04:36 +01:00
|
|
|
writeReg(REG_FRFLSB,
|
|
|
|
|
readReg(REG_FRFLSB)); // MUST write to LSB to affect change!
|
2018-04-05 21:20:12 +01:00
|
|
|
|
|
|
|
|
listenModeApplyHighSpeedSettings();
|
|
|
|
|
|
2026-03-29 18:04:36 +01:00
|
|
|
writeReg(REG_PACKETCONFIG1,
|
|
|
|
|
RF_PACKET1_FORMAT_VARIABLE | RF_PACKET1_DCFREE_WHITENING |
|
|
|
|
|
RF_PACKET1_CRC_ON | RF_PACKET1_CRCAUTOCLEAR_ON);
|
|
|
|
|
writeReg(REG_PACKETCONFIG2, RF_PACKET2_RXRESTARTDELAY_NONE |
|
|
|
|
|
RF_PACKET2_AUTORXRESTART_ON |
|
|
|
|
|
RF_PACKET2_AES_OFF);
|
2018-04-05 21:20:12 +01:00
|
|
|
writeReg(REG_SYNCVALUE1, 0x5A);
|
|
|
|
|
writeReg(REG_SYNCVALUE2, 0x5A);
|
2026-03-29 18:04:36 +01:00
|
|
|
writeReg(REG_LISTEN1, _rxListenResolution | _idleListenResolution |
|
|
|
|
|
RF_LISTEN1_CRITERIA_RSSI | RF_LISTEN1_END_10);
|
2018-04-05 21:20:12 +01:00
|
|
|
writeReg(REG_LISTEN2, _idleListenCoef);
|
|
|
|
|
writeReg(REG_LISTEN3, _rxListenCoef);
|
|
|
|
|
writeReg(REG_RSSITHRESH, 180);
|
|
|
|
|
writeReg(REG_RXTIMEOUT2, 75);
|
|
|
|
|
writeReg(REG_OPMODE, RF_OPMODE_SEQUENCER_ON | RF_OPMODE_STANDBY);
|
2026-03-29 18:04:36 +01:00
|
|
|
writeReg(REG_OPMODE,
|
|
|
|
|
RF_OPMODE_SEQUENCER_ON | RF_OPMODE_LISTEN_ON | RF_OPMODE_STANDBY);
|
2018-04-05 21:20:12 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
//=============================================================================
|
|
|
|
|
// listenModeEnd() - exit listen mode and reinit the radio
|
|
|
|
|
//=============================================================================
|
2023-08-13 02:29:01 +01:00
|
|
|
void RFM69::listenModeEnd(void) {
|
2018-04-05 21:20:12 +01:00
|
|
|
detachInterrupt(_interruptNum);
|
2026-03-29 18:04:36 +01:00
|
|
|
writeReg(REG_OPMODE,
|
|
|
|
|
RF_OPMODE_SEQUENCER_ON | RF_OPMODE_LISTENABORT | RF_OPMODE_STANDBY);
|
2018-04-05 21:20:12 +01:00
|
|
|
writeReg(REG_OPMODE, RF_OPMODE_SEQUENCER_ON | RF_OPMODE_STANDBY);
|
|
|
|
|
writeReg(REG_RXTIMEOUT2, 0);
|
|
|
|
|
setMode(RF69_MODE_STANDBY);
|
2026-03-29 18:04:36 +01:00
|
|
|
while ((readReg(REG_IRQFLAGS1) & RF_IRQFLAGS1_MODEREADY) == 0x00)
|
|
|
|
|
; // wait for ModeReady
|
2018-04-05 21:20:12 +01:00
|
|
|
listenModeReset();
|
|
|
|
|
reinitRadio();
|
|
|
|
|
}
|
|
|
|
|
|
2023-08-13 02:29:01 +01:00
|
|
|
void RFM69::listenModeApplyHighSpeedSettings() {
|
2026-03-29 18:04:36 +01:00
|
|
|
if (!_isHighSpeed)
|
|
|
|
|
return;
|
2018-04-05 21:20:12 +01:00
|
|
|
writeReg(REG_BITRATEMSB, RF_BITRATEMSB_200000);
|
|
|
|
|
writeReg(REG_BITRATELSB, RF_BITRATELSB_200000);
|
|
|
|
|
writeReg(REG_FDEVMSB, RF_FDEVMSB_100000);
|
|
|
|
|
writeReg(REG_FDEVLSB, RF_FDEVLSB_100000);
|
2025-01-03 12:22:35 +00:00
|
|
|
writeReg(REG_RXBW, RF_RXBW_DCCFREQ_000 | RF_RXBW_MANT_20 | RF_RXBW_EXP_0);
|
2026-03-29 18:04:36 +01:00
|
|
|
|
2018-04-05 21:20:12 +01:00
|
|
|
// Force LNA to the highest gain
|
2026-03-29 18:04:36 +01:00
|
|
|
// writeReg(REG_LNA, (readReg(REG_LNA) << 2) | RF_LNA_GAINSELECT_MAX);
|
2018-04-05 21:20:12 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
//=============================================================================
|
|
|
|
|
// sendBurst() - send a burst of packets to a sleeping listening node (or all)
|
|
|
|
|
//=============================================================================
|
2026-03-29 18:04:36 +01:00
|
|
|
void RFM69::listenModeSendBurst(uint8_t targetNode, const void *buffer,
|
|
|
|
|
uint8_t size) {
|
2018-04-05 21:20:12 +01:00
|
|
|
detachInterrupt(_interruptNum);
|
|
|
|
|
setMode(RF69_MODE_STANDBY);
|
2026-03-29 18:04:36 +01:00
|
|
|
writeReg(REG_PACKETCONFIG1,
|
|
|
|
|
RF_PACKET1_FORMAT_VARIABLE | RF_PACKET1_DCFREE_WHITENING |
|
|
|
|
|
RF_PACKET1_CRC_ON | RF_PACKET1_CRCAUTOCLEAR_ON);
|
|
|
|
|
writeReg(REG_PACKETCONFIG2, RF_PACKET2_RXRESTARTDELAY_NONE |
|
|
|
|
|
RF_PACKET2_AUTORXRESTART_ON |
|
|
|
|
|
RF_PACKET2_AES_OFF);
|
2018-04-05 21:20:12 +01:00
|
|
|
writeReg(REG_SYNCVALUE1, 0x5A);
|
|
|
|
|
writeReg(REG_SYNCVALUE2, 0x5A);
|
|
|
|
|
listenModeApplyHighSpeedSettings();
|
|
|
|
|
writeReg(REG_FRFMSB, readReg(REG_FRFMSB) + 1);
|
2026-03-29 18:04:36 +01:00
|
|
|
writeReg(REG_FRFLSB,
|
|
|
|
|
readReg(REG_FRFLSB)); // MUST write to LSB to affect change!
|
2018-04-05 21:20:12 +01:00
|
|
|
|
2023-08-13 02:29:01 +01:00
|
|
|
union { // union to simplify addressing of long and short parts of time offset
|
2018-04-05 21:20:12 +01:00
|
|
|
int32_t l;
|
|
|
|
|
uint8_t b[4];
|
|
|
|
|
} timeRemaining;
|
|
|
|
|
|
|
|
|
|
uint16_t cycleDurationMs = _listenCycleDurationUs / 1000;
|
|
|
|
|
timeRemaining.l = cycleDurationMs;
|
|
|
|
|
|
|
|
|
|
#ifdef RF69_WL_DEBUG
|
|
|
|
|
Serial.print("Sending burst for ");
|
|
|
|
|
Serial.print(cycleDurationMs, DEC);
|
|
|
|
|
Serial.println(" ms");
|
|
|
|
|
#endif
|
|
|
|
|
|
|
|
|
|
setMode(RF69_MODE_TX);
|
|
|
|
|
uint32_t numSent = 0;
|
|
|
|
|
uint32_t startTime = millis();
|
|
|
|
|
|
2026-03-29 18:04:36 +01:00
|
|
|
while (timeRemaining.l > 0) {
|
2018-04-05 21:20:12 +01:00
|
|
|
noInterrupts();
|
|
|
|
|
// write to FIFO
|
|
|
|
|
select();
|
2020-06-02 12:43:09 +01:00
|
|
|
_spi->transfer(REG_FIFO | 0x80);
|
2026-03-29 18:04:36 +01:00
|
|
|
_spi->transfer(size + 4); // two bytes for target and sender node, two bytes
|
|
|
|
|
// for the burst time remaining
|
2020-06-02 12:43:09 +01:00
|
|
|
_spi->transfer(targetNode);
|
|
|
|
|
_spi->transfer(_address);
|
2018-04-05 21:20:12 +01:00
|
|
|
|
2026-03-29 18:04:36 +01:00
|
|
|
// We send the burst time remaining with the packet so the receiver knows
|
|
|
|
|
// how long to wait before trying to reply
|
2020-06-02 12:43:09 +01:00
|
|
|
_spi->transfer(timeRemaining.b[0]);
|
|
|
|
|
_spi->transfer(timeRemaining.b[1]);
|
2018-04-05 21:20:12 +01:00
|
|
|
|
|
|
|
|
for (uint8_t i = 0; i < size; i++) {
|
2026-03-29 18:04:36 +01:00
|
|
|
_spi->transfer(((uint8_t *)buffer)[i]);
|
2018-04-05 21:20:12 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
unselect();
|
|
|
|
|
interrupts();
|
|
|
|
|
|
2026-03-29 18:04:36 +01:00
|
|
|
while ((readReg(REG_IRQFLAGS2) & RF_IRQFLAGS2_FIFONOTEMPTY) != 0x00)
|
|
|
|
|
; // make sure packet is sent before putting more into the FIFO
|
2018-04-05 21:20:12 +01:00
|
|
|
timeRemaining.l = cycleDurationMs - (millis() - startTime);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
setMode(RF69_MODE_STANDBY);
|
|
|
|
|
reinitRadio();
|
|
|
|
|
}
|
2026-03-29 18:04:36 +01:00
|
|
|
#endif
|